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What is RT3050F?

This electronic component, produced by the manufacturer "Ralink", performs the same function as "(RT3050 / RT3052) high performance 384MHz MIPS24KEc CPU core".


RT3050F Datasheet PDF - Ralink

Part Number RT3050F
Description (RT3050 / RT3052) high performance 384MHz MIPS24KEc CPU core
Manufacturers Ralink 
Logo Ralink Logo 


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Application
802.11 b/g/n AP/Router
Dual Band Concurrent Router
NAS
• iNIC
RT3050/52
Datasheet
Preliminary
Revision August 14, 2008
The RT3052 SOC combines Ralink’s 802.11n draft
compliant 2T2R MAC/BBP/RF, a high performance
384MHz MIPS24KEc CPU core, 5-port integrated
10/100 Ethernet switch/PHY, an USB OTG and a
Gigabit Ethernet MAC. With the RT3052, there are
very few external components required for 2.4GHz
11n wireless products. The RT3052 employs Ralink
2nd generation 11n technologies for longer range and
better throughput. The embedded high performance
CPU can process advanced applications effortlessly,
such as routing, security and VOIP. The USB por t can
be configured to access external storage for Digital
Home applications. In addition, the RT3052 has rich
hardware interfaces (SPI/I2S/I2C/UART/GMAC) to
enable many possible applications.
Support 16/32-bit SDR SDRAM (up-to 64M bytes)
SDRAM data [31:16] sre pins shared with GPIO
Support boot from 8/16-bit parallel NOR type Flash
(up-to 16M bytes))
Support boot from NAND type Flash (up-to 64 M bytes)
Support boot from ROM iNIC mode
USB2.0 OTG x 1
Embedded a 7-port Ethernet switch and a 5 port
10/100Mbps PHY
Support 5 10/100 UTP ports and one RGMII/MII port for
RT3052 only
Hardware NAT, QoS, TCP/UDP/IP Checksum offloading
Slow speed I/O : GPIO, I2C, SPI, UART, MDC/MDIO,
JTAG,PCM and I2S
Package and I/O voltage
14mm x 14mm TFBGA-289 Package
I/O : 3.3V/2.5V(RGMII), 3.3v I/O
Features
Embedded 2 T2R 2.4G CMOS RF
Embedded 802.11n 2T2R MAC/BBP w/MLD
enhancement
300Mbps PHY data rate
1x1/1x2/2x2 modes
20Mhz/40Mhz channel width
Legacy and high throughout modes
Reverse Data Grant (RDG) support
Compressed Block ACK
Up to 256 clients
Multiple BSSID (up to 8)
WEP64/128, WPA, WPA2 engines
QOS - WMM, WMM Power Save
Hardware frame aggregation
International Regulation - 802.11h TPC
MIPS 24KEc 384Mhz with 32KB I cache/16KB D
cache
Order Information
Part Number Temp Range Package
RT3050F -10~550C Green/ RoHS Compliant
TFBGA 289 ball
RT3052F
-10~55 0C
(14mmx14mm)
Green/ RoHS Compliant
TFBGA 289 ball
(14mmx14mm)
Ralink Technology, Corp. (Taiwan)
5th F. No. 36,Taiyuan St, Jhubei City, Hsin-Chu, Taiwan,
R.O.C.
Tel: 886-3-560-0868 Fax: 886-3-560-0818
Ralink Technology, Corp. (USA)
20833 Stevens Creek Blvd., Suite 200 Cupertino, CA95014
Tel: (408) 725-8070 Fax: (408)725-8069
h ttp ://www.ralink te ch .co m
Comparison Table
Feature
Package
Dimension
Balls
CPU
Cache
SDRAM
NOR Flash
NAND Flash
RGMII
USB 2.0
TxRx
Band
Power Consumption
RT3050F
TFBGA
14mmx14mm
289
320 MHz
16K I-Cache + 16K D-Cache
16 bit (32MB)
8/16 bit (16MB*2)
8bit (32MB)
NO
YES
1x1
2.4 GHz
1.9W
Device
RT3052F
TFBGA
14mmx14mm
289
320/384 MHz
32K I-Cache + 16K D-Cache
16/32 bit (64MB)
8/16 bit (16MB*2)
8bit (32MB)
YES
YES
2x2
2.4 GHz
2.3W
DSR3050/52_V.2.0_081408
Form No.QS-073-F02
Rev.1
Kept byDCC
-1-
Ret. T ime5 Years
Free Datasheet http://www.datasheetlist.com/

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RT3050F equivalent
RT3050/52
Datasheet
Preliminary
Revision August 14, 2008
3.18.1 Features..........................................................................................................111
3.18.2 Block Diagram .................................................................................................112
3.18.3 Register Description (base: 0x1011.0000) .........................................................113
3.18.4 MII control register..........................................................................................127
3.19 USB OTG Controller & PHY .....................................................................................130
3.19.1 Features..........................................................................................................130
3.19.2 Block Diagram .................................................................................................130
3.19.3 Register Description (base: 0x101C.0000) .........................................................131
3.20 802.11n 2T2R MAC/BBP.........................................................................................180
3.20.1Features ..........................................................................................................180
3.20.2Block Diagram..................................................................................................180
3.20.3Register Description (base: 0x1018.0000) .........................................................181
4. Package Physical Dimension...........................................................................................233
4.1 TFBGA 289B14×14×0.94mm............................................................................233
5. Revision History.............................................................................................................235
DSR3050/52_V.2.0_081408
Form No.QS-073-F02
Rev.1
Kept byDCC
-5-
Ret. T ime5 Years
Free Datasheet http://www.datasheetlist.com/


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