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PDF HI-518 Data sheet ( Hoja de datos )
| Número de pieza | HI-518 | |
| Descripción | 8-Channel/Differential 4-Channel/ CMOS High Speed Analog Multiplexer | |
| Fabricantes | Intersil Corporation | |
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Data Sheet
HI-518
June 1999 File Number 3147.2
8-Channel/Differential 4-Channel, CMOS
High Speed Analog Multiplexer
The Hl-518 is a monolithic, dielectrically isolated, high
speed, high performance CMOS analog multiplexer. It offers
unique built-in channel selection decoding plus an inhibit
input for disabling all channels. The dual function of address
input A2 enables the Hl-518 to be user programmed either
as a single ended 8-Channel multiplexer by connecting ‘Out
A’ to ‘Out B’ and using A2 as a digital address input, or as a
4-Channel differential multiplexer by connecting A2 to the V-
supply. The substrate leakages and parasitic capacitances
are reduced substantially by using the Intersil Dielectric
Isolation process to achieve optimum performance in both
high and low level signal applications. The low output
leakage current (lD(OFF) < 100pA at 25oC) and fast settling
(tSETTLE = 800ns to 0.01%) characteristics of the device
make it an ideal choice for high speed data acquisition
systems, precision instrumentation, and industrial process
control.
Ordering Information
PART NUMBER
HI3-0518-5
HI1-0518-5
HI1-0518-8
TEMP.
RANGE (oC)
PACKAGE
0 to 75 18 Ld PDIP
0 to 75 18 Ld CERDIP
-55 to 125 18 Ld CERDIP
PKG.
NO.
E18.3
F18.3
F18.3
Features
• Access Time (Typical) . . . . . . . . . . . . . . . . . . . . . . 130ns
• Settling Time . . . . . . . . . . . . . . . . . . . . . . . . 250ns (0.1%)
• Low Leakage (Typical)
- IS(OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10pA
- ID(OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15pA
• Low Capacitance (Max)
- CS(OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5pF
- CD(OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10pF
• Off Isolation at 500kHz . . . . . . . . . . . . . . . . . 45dB (Min)
• Low Charge Injection Error . . . . . . . . . . . . . . . . . . . 25mV
• Single Ended to Differential Selectable (SDS)
• Logic Level Selectable (LLS)
Applications
• Data Acquisition Systems
• Precision Instrumentation
• Industrial Control
Pinout
HI-518 (CERDIP, PDIP)
TOP VIEW
V+ 1
OUT B 2
IN8/4B 3
IN7/3B 4
IN6/2B 5
IN5/1B 6
GND 7
VDD/LLS 8
A2/SDS 9
18 OUT A
17 V-
16 IN4/4A
15 IN3/3A
14 IN2/2A
13 IN1/1A
12 ENABLE
11 A0
10 A1
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page  
HI-518
Test Circuits and Waveforms VDD/LLS = GND, Unless Otherwise Specified (Continued)
+15V
3.5V
ADDRESS
DRIVE (VA)
0V
OUTPUT
S1 ON 50%
50% S8 ON
tOPEN
V+
A2 / SDS
IN 1
IN 2-7
VA 50Ω
A1 IN 8
A0 OUTA
2.4V
EN OUTB
VDD/LLS V-
GND
800
Ω
-15V
FIGURE 6A. MEASUREMENT POINTS
FIGURE 6B. TEST CIRCUIT
FIGURE 6. BREAK-BEFORE-MAKE DELAY
+5V
VOUT
12.5pF
50%
3.5V
50%
ENABLE
DRIVE (VA)
0V
+15V
V+
A2 / SDS
IN 1
+10V
90%
tON(EN)
OUTPUT
10%
0V
tOFF(EN)
VA
FIGURE 7A. MEASUREMENT POINTS
FIGURE 7. ENABLE DELAY
A1 IN 2-8
A0
EN OUTA
50
VDD/LLS V-
800
ΩΩ
GND
-15V
FIGURE 7B. TEST CIRCUIT
12.5pF
VA
VOUT
3V
0V
∆VO
2.4V
+15V
V+
A0, A1,
A2 / SDS
OUT
IN A OR B
EN
VOUT
CL = 100pF
VA GND VDD/LLS V-
FIGURE 8A. MEASUREMENT POINTS
∆VO is the measured voltage error due to charge injection. The error
in coulombs is Q = CL x ∆VO.
FIGURE 8. CHARGE INJECTION
-15V
FIGURE 8B. TEST CIRCUIT
5
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