5019MTC Datasheet PDF - Fairchild Semiconductor
Part Number | 5019MTC | |
Description | FAN5019MTC | |
Manufacturers | Fairchild Semiconductor | |
Logo | ||
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FAN5019
6-Bit VID Controller 2-4 Phase VRM10.X Controller
Features
• Pin and Function Backward Compatible with FAN53168
and FAN53180 Controllers
• Precision Multi-Phase DC-DC Core Voltage Regulation
– ±10mV Output Voltage Accuracy Over Temperature
• Differential Remote Voltage Sensing
• Selectable 2, 3, or 4 Phase Operation
• Selectable VRM9 or VRM10 Operation
• Up to 1MHz per Phase Operation (4MHz ripple
Frequency)
• Lossless Inductor Current Sensing for Loadline
Compensation
– External Temperature Compensation
• Accurate Load-Line Programming (Meets Intel®
VRM/VRD10.0 and 10.X CPU Specifications)
• Accurate Channel-Current Balancing for Thermal
Optimization and Layout Compensation
• Convenient 12V Supply Biasing
• 6-bit Voltage Identification (VID) Input
– .8375V to 1.600V in 12.5mV Steps
– Dynamic VID Capability with Fault-Blanking for
glitch-less Output voltage Changes
• Adjustable Over Current Protection with Programmable
Latch-Off Delay. Latch-Off Function may be Disabled
• Over-Voltage Protection – Internal OVP Crowbar
Protection
Applications
• Computer DC/DC Converter VRM/VRD10.0
• Computer DC/DC Converter VRM/VRD10.X
• Computer DC/DC Converter VRM/VRD9.X
• High Current, Low Voltage DC/DC Rail
General Description
The FAN5019 is a multi-phase DC-DC controller for imple-
menting high-current, low-voltage, CPU core power regula-
tion circuits. It is part of a chipset that includes external
MOSFET drivers and power MOSFETS. The FAN5019
drives up to four synchronous-rectified buck channels in par-
allel. The multi-phase buck converter architecture uses inter-
leaved switching to multiply ripple frequency by the number
of phases and reduce input and output ripple currents. Lower
ripple results in fewer components, lower component cost,
reduced power dissipation, and smaller board area.
The FAN5019 features a high bandwidth control loop to
provide optimal response to load transients. The FAN5019
senses current using lossless techniques: Phase current is
measured through each of the output inductors. This current
information is summed, averaged and used to set the loadline
of the output via programmable "droop". The droop is tem-
perature compensated to achieve precise loadline character-
istics over the entire operating range. Additionally,
individual phase current is measured using the RDS(ON) of
the low-side MOSFETs. This information is used to dynam-
ically balance/steer per-phase current. The phase currents
are also summed and averaged for over-current detection.
Dynamic-VID technology allows on-the-fly VID changes
with controlled, glitch-less output. Additionally, short-circuit
protection, adjustable current limiting, over-voltage protec-
tion and power-good circuitry combine to ensure reliable and
safe operation. The operating temperature range is 0°C to
+85°C and the operating voltage is a single +12V supply,
which simplifies the design. The FAN5019 is available in a
TSSOP-28 package.
Block Diagram
VIN
Φ1 FAN5009
Φ2
FAN5019
Φ3
Φ4 FAN5009
VIN
VOUT
REV. 1.0.7 1/5/04
Free Datasheet http://www.datasheet-pdf.com/
|
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PRODUCT SPECIFICATION
FAN5019
Electrical Specifications
(VCC = 12V, TA = 0°C to +85°C and FBRTN=GND, using circuit in Figure 1, unless otherwise noted.)
The • denotes specifications which apply over the full operating temperature range.
Parameter
Error Amplifier
Output Voltage Range
Accuracy
Symbol
VCOMP
VFB
Line Regulation
Input Bias Current
FBRTN Current
Output Current
Gain Bandwidth Product
DC Gain
VID Inputs
Input Low Voltage
∆VFB
IFB
IFBRTN
IO(ERR)
GBW
VIL(VID)
Input High Voltage
VIH(VID)
Input Current, VID Low
Input Current, VID High
Pull-up Resistance
Internal Pull-up Voltage
IIL(VID)
IIH(VID)
RVID
VID Transition Delay Time2
“No CPU” Detection
Turn-off Delay Time2
VID Table Select
Vtblsel
Oscillator
Frequency
Frequency Variation
fOSC
fPHASE
Output Voltage
RAMPADJ Pin Accuracy
VRT
VRAMPADJ
RAMPADJ Input Current
Current Sense Amplifier
Offset Voltage
Input Bias Current
Gain Bandwidth Product
IRAMPADJ
VOS(CSA)
IBIAS(CSA)
GBW
Conditions
Min. Typ. Max. Units
Relative to DAC Setting,
referenced to FBRTN,
CSSUM = CSCOMP,
Test Circuit 3
VCC=10V to 14V
FB forced to VOUT – 3%
COMP = FB
CCOMP = 10pF
VRM10
VRM9
•
•
•
0.5
-10
-12
3.5 V
+10 mV
+12
0.05
• -13 -15 -17
• 150 180
300 500
20
77
%
µA
µA
µA
MHz
dB
VRM10
VRM9
• 0.4
• 0.8
VRM10
VRM9
• 0.8
• 2.0
VID(X) = 0V
• -30 -20
VID(X) = 1.25V
• -2
2
Internal
• 35 60 115
VRM10
VRM9
• 1.0 1.15 1.26
• 2.2 2.4 2.6
VID Code Change to FB Change
• 400
VID Code Change to 11111X to PWM
going low
• 400
To select VRM9 table
•
To select VRM10 table (becomes VID5) •
4
3.5
V
V
V
V
µA
µA
kΩ
V
V
ns
ns
V
V
TA = +25°C, RT = 250kΩ, 4-Phase
TA = +25°C, RT = 115kΩ, 4-Phase
TA = +25°C, RT = 75kΩ, 4-Phase
RT = 100kΩ to GND
VRAMPADJ = Vdac = +2K • (Vin–Vdac)/
(Rr+2k)
Current into RAMPADJ pin
• 200
4000 kHz
• 155 200 245
400
600
kHz
kHz
kHz
• 1.9 2.0 2.1
V
• -50
+50 mV
0 100 µA
CSSUM–CSREF, Test Circuit 1
COMP = FB
• -1.5
+1.5 mV
• -50
+50 nA
10 MHz
Notes:
1. All limits at operating temperature extremes are guaranteed by design, characterization and statistical quality control
2. Guaranteed by design – NOT tested in production.
REV. 1.0.7 1/5/04
5
Free Datasheet http://www.datasheet-pdf.com/
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