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25Q80A Datasheet PDF - EON

Part Number 25Q80A
Description EN25Q80A
Manufacturers EON 
Logo EON Logo 

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25Q80A datasheet, circuit
EN25Q80A
EN25Q80A
8 Megabit Serial Flash Memory with 4Kbyte Uniform Sector
FEATURES
Single power supply operation
- Full voltage range: 2.7-3.6 volt
Serial Interface Architecture
- SPI Compatible: Mode 0 and Mode 3
8 M-bit Serial Flash
- 8 M-bit/1024 K-byte/4096 pages
- 256 bytes per programmable page
Standard, Dual or Quad SPI
- Standard SPI: CLK, CS#, DI, DO, WP#
- Dual SPI: CLK, CS#, DQ0, DQ1, WP#
- Quad SPI: CLK, CS#, DQ0, DQ1, DQ2, DQ3
High performance
- 100MHz clock rate for one data bit
- 80MHz clock rate for two data bits
- 80MHz clock rate for four data bits
Low power consumption
- 12 mA typical active current
- 1 μA typical power down current
Uniform Sector Architecture:
- 256 sectors of 4-Kbyte
- 16 blocks of 64-Kbyte
- Any sector or block can be erased individually
Software and Hardware Write Protection:
- Write Protect all or portion of memory via
software
- Enable/Disable protection with WP# pin
High performance program/erase speed
- Page program time: 1.3ms typical
- Sector erase time: 90ms typical
- Block erase time 500ms typical
- Chip erase time: 8 seconds typical
Lockable 256 byte OTP security sector
Minimum 100K endurance cycle
Package Options
- 8 pins SOP 150mil body width
- 8 pins SOP 200mil body width
- 8 contact VDFN
- 8 pins PDIP
- All Pb-free packages are RoHS compliant
Industrial temperature Range
GENERAL DESCRIPTION
The EN25Q80A is an 8 Megabit (1024K-byte) Serial Flash memory, with advanced write protection
mechanisms. The EN25Q80A supports the standard Serial Peripheral Interface (SPI), and a high
performance Dual output as well as Quad I/O using SPI pins: Serial Clock, Chip Select, Serial DQ0(DI),
DQ1(DO), DQ2(WP#) and DQ3(NC). SPI clock frequencies of up to 80MHz are supported allowing
equivalent clock rates of 160MHz for Dual Output and 320MHz for Quad Output when using the
Dual/Quad Output Fast Read instructions. The memory can be programmed 1 to 256 bytes at a time,
using the Page Program instruction.
The EN25Q80A is designed to allow either single Sector/Block at a time or full chip erase operation. The
EN25Q80A can be configured to protect part of the memory as the software protected mode. The
device can sustain a minimum of 100K program/erase cycles on each sector or block.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
1
©2004 Eon Silicon Solution, Inc.,
Rev. D, Issue Date: 2009/10/13
www.eonssi.com
Free Datasheet http://www.datasheet4u.net/

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25Q80A equivalent
EN25Q80A
MEMORY ORGANIZATION
The memory is organized as:
z 1,048,576 bytes
z Uniform Sector Architecture
16 blocks of 64-Kbyte
256 sectors of 4-Kbyte
z 4096 pages (256 bytes each)
Each page can be individually programmed (bits are programmed from 1 to 0). The device is Sector,
Block or Chip Erasable but not Page Erasable.
Table 2. Uniform Block Sector Architecture (Continued)
Block
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Sector
255
240
239
224
223
208
207
192
191
176
175
160
159
144
143
128
127
112
111
96
95
80
79
64
63
48
47
32
31
16
15
Address range
0FF000h
0F0000h
0EF000h
0E0000h
0DF000h
0D0000h
0CF000h
0C0000h
0BF000h
0B0000h
0AF000h
0A0000h
09F000h
090000h
08F000h
080000h
07F000h
070000h
06F000h
060000h
05F000h
050000h
04F000h
040000h
03F000h
030000h
02F000h
020000h
01F000h
010000h
00F000h
0FFFFFh
0F0FFFh
0EFFFFh
0E0FFFh
0DFFFFh
0D0FFFh
0CFFFFh
0C0FFFh
0BFFFFh
0B0FFFh
0AFFFFh
0A0FFFh
09FFFFh
090FFFh
08FFFFh
080FFFh
07FFFFh
070FFFh
06FFFFh
060FFFh
05FFFFh
050FFFh
04FFFFh
040FFFh
03FFFFh
030FFFh
02FFFFh
020FFFh
01FFFFh
010FFFh
00FFFFh
4
03
2
1
0
004000h
003000h
002000h
001000h
000000h
004FFFh
003FFFh
002FFFh
001FFFh
000FFFh
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2004 Eon Silicon Solution, Inc.,
Rev. D, Issue Date: 2009/10/13
www.eonssi.com
Free Datasheet http://www.datasheet4u.net/

5 Page
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Information Total 30 Pages
Download[ 25Q80A.PDF Datasheet ]

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