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PDF LT3083 Data sheet ( Hoja de datos )
| Número de pieza | LT3083 | |
| Descripción | Adjustable 3A Single Resistor Low Dropout Regulator | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
n Outputs May be Paralleled for Higher Current and
Heat Spreading
n Output Current: 3A
n Single Resistor Programs Output Voltage
n 50µA Set Pin Current: 1% Initial Accuracy
n Output Adjustable to 0V
n Low Output Noise: 40µVRMS (10Hz to 100kHz)
n Wide Input Voltage Range: 1.2V to 23V
(DD-Pak and TO-220 Packages)
n Low Dropout Voltage: 310mV
n <1mV Load Regulation
n <0.001%/V Line Regulation
n Minimum Load Current: 1mA
n Stable with Minimum 10µF Ceramic Capacitor
n Current Limit with Foldback and Overtemperature
Protection
n Available in 16-Lead TSSOP, 12-Lead 4mm × 4mm
DFN, 5-Lead TO-220 and 5-Lead Surface Mount
DD-PAK Packages
APPLICATIONS
n High Current All Surface Mount Supply
n High Efficiency Linear Regulator
n Post Regulator for Switching Supplies
n Low Parts Count Variable Voltage Supply
n Low Output Voltage Power Supplies
LT3083
Adjustable 3A
Single Resistor Low
Dropout Regulator
DESCRIPTION
The LT®3083 is a 3A low dropout linear regulator that can
be paralleled to increase output current or spread heat on
surface mounted boards. Architected as a precision current
source and voltage follower, this new regulator finds use
in many applications requiring high current, adjustability
to zero, and no heat sink. The device also brings out the
collector of the pass transistor to allow low dropout opera-
tion—down to 310mV—when used with multiple supplies.
A key feature of the LT3083 is the capability to supply a
wide output voltage range. By using a reference current
through a single resistor, the output voltage is programmed
to any level between zero and 23V (DD-PAK and TO-220
packages). The LT3083 is stable with 10µF of capacitance
on the output, and the IC is stable with small ceramic ca-
pacitors that do not require additional ESR as is common
with other regulators.
Internal protection circuitry includes current limiting and
thermal limiting. The LT3083 is offered in the 16-lead
TSSOP (with an exposed pad for better thermal character-
istics), 12-lead 4mm × 4mm DFN (also with an exposed
pad), 5-lead TO-220, and 5-lead surface mount DD-PAK
packages.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.5V to 0.9V at 3A Supply (Using 3.3V VCONTROL)
VCONTROL
3.3V
VIN
1.5V
4.7µF
IN
10µF
VCONTROL
LT3083 OUT
SET
3083 TA01a
RSET
18.2k
1%
10µF
0.1µF
*RMIN
909Ω
VOUT = 0.9V
IMAX = 3A
*OPTIONAL FOR
MINIMUM 1mA LOAD
REQUIREMENT
Set Pin Current Distribution
N = 1052
49 49.5 50 50.5 51
SET PIN CURRENT DISTRIBUTION (µA)
3083 TA01b
3083fa
1
1 page  
LT3083
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
SET Pin Current
50.5
50.4
50.3
50.2
50.1
50.0
49.9
49.8
49.7
49.6
49.5
–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
3083 G01
Set Pin Current Distribution
N = 1052
49 49.5 50 50.5 51
SET PIN CURRENT DISTRIBUTION (µA)
3083 G02
Offset Voltage (VOUT – VSET)
1.0
0.8 ILOAD = 5mA
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
3083 G03
Offset Voltage Distribution
N = 1052
–3 –2 –1 0 1 2
VOS DISTRIBUTION (mV)
3
3083 G04
Offset Voltage (VOUT – VSET)
1.00
ILOAD = 5mA
0.75
0.50
0.25
0
–0.25
–0.50
–0.75
–1.00
0
5 10 15 20
INPUT-TO-OUTPUT VOLTAGE (V)
25
3083 G05
Offset Voltage (VOUT – VSET)
0.25
0
–0.25
TJ = 25°C
–0.50
–0.75
TJ = 125°C
–1.00
–1.25
–1.50
–1.75 0
0.5 1 1.5 2 2.5
LOAD CURRENT (A)
3
3083 G06
Load Regulation
0 100
–0.2 CHANGE IN OFFSET VOLTAGE (VOUT – VSET) 50
–0.4
–0.6 CHANGE IN REFERENCE CURRENT
0
–50
–0.8 –100
–1.0 –150
–1.2 –200
–1.4 ∆ILOAD = 5mA TO 3A
VIN = VCONTROL = VOUT + 2V
–1.6
–50 –25 0 25 50 75
–250
–300
100 125 150
TEMPERATURE (°C)
3083 G07
Minimum Load Current
1.4 VIN = VCONTROL
1.2
1.0
VIN,CONTROL – VOUT = 23V
0.8
0.6
VIN,CONTROL – VOUT = 1.5V
0.4
0.2
0–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
3083 G08
Dropout Voltage, T/Q Packages
(Minimum IN Voltage)
400
350
TJ = 125°C
300
250 TJ = 25°C
200
150
TJ = –50°C
100
50
0 0 0.5 1 1.5 2 2.5 3
LOAD CURRENT (A)
3083 G09
3083fa
5
5 Page 
LT3083
APPLICATIONS INFORMATION
Table 1 lists many common output voltages and the clos-
est standard 1% resistor values used to generate that
output voltage.
Regulation of the output voltage requires a minimum
load current of 1mA. For a true zero voltage output
operation, return this 1mA load current to a negative
supply voltage.
Table 1. 1% Resistors for Common Output Voltages
VOUT (V)
1
RSET (k)
20
1.2 24.3
1.5 30.1
1.8 35.7
2.5 49.9
3.3 66.5
5 100
With the lower level current used to generate the refer-
ence voltage, leakage paths to or from the SET pin can
create errors in the reference and output voltages. High
quality insulation should be used (e.g., Teflon, Kel-F);
cleaning of all insulating surfaces to remove fluxes and
other residues will probably be required. Surface coating
may be necessary to provide a moisture barrier in high
humidity environments.
Minimize board leakage by encircling the SET pin and
circuitry with a guard ring operated at a potential close
to itself. Tie the guard ring to the OUT pin. Guard rings
on both sides of the circuit board are required. Bulk leak-
age reduction depends on the guard ring width. 50nA
of leakage into or out of the SET pin and its associated
circuitry creates a 0.1% reference voltage error. Leakages
of this magnitude, coupled with other sources of leakage,
can cause significant offset voltage and reference drift,
especially over the possible operating temperature range.
Figure 2 depicts an example of a guard ring layout.
If guard ring techniques are used, this bootstraps any
stray capacitance at the SET pin. Since the SET pin is
a high impedance node, unwanted signals may couple
into the SET pin and cause erratic behavior. This will
be most noticeable when operating with minimum
output capacitors at full load current. The easiest way
OUT
GND SET PIN
3083 F02
Figure 2. Guard Ring Layout Example
for DF Package
to remedy this is to bypass the SET pin with a small
amount of capacitance from SET to ground, 10pF to
20pF is sufficient.
Stability and Input Capacitance
Typical minimum input capacitance is 10µF for IN and
2.2µF for VCONTROL. These amounts of capacitance work
well using low ESR ceramic capacitors when placed close
to the LT3083 and the circuit is located in close proximity
to the power source. Higher values of input capacitance
may be necessary to maintain stability depending on the
application.
Oscillating regulator circuits are often viewed as a problem
of phase margin and inadequate stability with the output
capacitor used. More and more frequently, the problem
is not the regulator operating without sufficient output
capacitance, but instead with too little input capacitance.
The entire circuit must be analyzed and debugged as a
whole; conditions relating to the input of the regulator
cannot be ignored.
The LT3083 input presents a high impedance to its power
source: the output voltage and load current are independent
of input voltage variations. To maintain stability of the
regulator circuit as a whole, the LT3083 must be powered
from a low impedance supply. When using short supply
lines or powering directly from a large switching supply,
there is no issue—hundreds or thousands of microfarads
of capacitance are available through a low impedance.
3083fa
11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet LT3083.PDF ] | |
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