DataSheet39.com

74ACT74P Datasheet PDF - Toshiba

Part Number 74ACT74P
Description TC74ACT74P
Manufacturers Toshiba 
Logo Toshiba Logo 

Preview ( 10 pages )
		
74ACT74P datasheet, circuit
TC74ACT74P/F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74ACT74P,TC74ACT74F,TC74ACT74FN,TC74ACT74FT
Dual D-Type Flip Flop with Preset and Clear
The TC74ACT74 is an advanced high speed CMOS D-FLIP
FLOP fabricated with silicon gate and double-layer metal wiring
C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This device may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL, NMOS and CMOS output voltage levels.
The signal level applied to the D INPUT is transferred to Q
OUTPUT during the positive going transition of the CK pulse.
CLR and PR are independent of the CK and are
accomplished by setting the appropriate input to an “L” level.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: fmax = 180 MHz (typ.) at VCC = 5 V
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
Compatible with TTL outputs: VIL = 0.8 V (max)
VIH = 2.0 V (min)
Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50 Ω
transmission lines.
Balanced propagation delays: tpLH ∼− tpHL
Pin and function compatible with 74F74
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74ACT74P
TC74ACT74F
TC74ACT74FN
TC74ACT74FT
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
1 2007-10-01
Free Datasheet http://www.datasheet4u.com/

No Preview Available !


1 page
line_dark_gray
74ACT74P equivalent
TC74ACT74P/F/FN/FT
AC Characteristics (CL = 50 pF, RL = 500 , input: tr = tf = 3 ns)
Characteristics
Propagation delay
time
(CK-Q, Q )
Propagation delay
time
( CLR , PR -Q, Q )
Maximum clock
frequency
Input capacitance
Power dissipation
capacitance
Symbol
tpLH
tpHL
tpLH
tpHL
fmax
CIN
CPD
Test Condition
VCC (V)
Ta = 25°C
Min Typ. Max
5.0 ± 0.5
6.1 9.2
5.0 ± 0.5
6.5 10.1
5.0 ± 0.5 95 160
5 10
(Note) 35
Ta =
40 to 85°C
Min Max
Unit
1.0 10.5 ns
1.0 11.5 ns
95 MHz
10 pF
― ― pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC/2 (per F/F)
5 2007-10-01
Free Datasheet http://www.datasheet4u.com/

5 Page
line_dark_gray


Information Total 10 Pages
Download[ 74ACT74P.PDF Datasheet ]

Share Link :

Electronic Components Distributor

SparkFun Electronics Allied Electronics DigiKey Electronics Arrow Electronics
Mouser Electronics Adafruit Element14 Chip One Stop



Featured Datasheets

Part NumberDescriptionManufacturers
74ACT74The function is DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR.STMicroelectronics
STMicroelectronics
74ACT74The function is Dual D-Type Positive Edge-Triggered Flip-Flop.Fairchild Semiconductor
Fairchild Semiconductor
74ACT74The function is DUAL D-TYPE FLIP FLOP.ST Microelectronics
ST Microelectronics

Quick jump to:

74AC  1N4  2N2  2SA  2SC  74H  ADC  BC  BF  BU  CXA  HCF  IRF  KA  KIA  LA  LM  MC  NE  ST  STK  TDA  TL  UA 


DataSheet39.com is an Online Datasheet PDF Search Site.
It offers a large amount of data sheet, You can free PDF files download.
The updated every day, always provide the best quality and speed.



keyword : 74ACT74P schematic, 74ACT74P equivalent, 74ACT74P pinout

DataSheet39.com   |  2018   |  Privacy Policy |  Contact Us  | New  |  Search