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PDF MAX5825 Data sheet ( Hoja de datos )
| Número de pieza | MAX5825 | |
| Descripción | (MAX5823 - MAX5825) 8-/10-/12-Bit Buffered Output DACs | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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EVALUATION KIT AVAILABLE
MAX5823/MAX5824/MAX5825
Ultra-Small, Octal Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
General Description
The MAX5823/MAX5824/MAX5825 8-channel, low-power,
8-/10-/12-bit, voltage-output digital-to-analog converters
(DACs) include output buffers and an internal 3ppm/°C
reference that is selectable to be 2.048V, 2.500V, or
4.096V. The MAX5823/MAX5824/MAX5825 accept a
wide supply voltage range of 2.7V to 5.5V with extremely
low power (6mW) consumption to accommodate most
low-voltage applications. A precision external reference
input allows rail-to-rail operation and presents a 100kI
(typ) load to an external reference.
The MAX5823/MAX5824/MAX5825 have an I2C-compatible,
2-wire interface that operates at clock rates up to
400kHz. The DAC output is buffered and has a low sup-
ply current of less than 250FA per channel and a low
offset error of Q0.5mV (typ). On power-up, the MAX5823/
MAX5824/MAX5825 reset the DAC outputs to zero or mid-
scale based on the status of M/Z logic input, providing
flexibility for a variety of control applications. The internal
reference is initially powered down to allow use of an
external reference. The MAX5823/MAX5824/MAX5825
allow simultaneous output updates using software LOAD
commands or the hardware load DAC logic input (LDAC).
The MAX5823/MAX5824/MAX5825 feature a watchdog
function which can be enabled to monitor the I/O inter-
face for activity and integrity.
A clear logic input (CLR) allows the contents of the CODE
and the DAC registers to be cleared asynchronously and
simultaneously sets the DAC outputs to the program-
mable default value. The MAX5823/MAX5824/MAX5825
are available in a 20-pin TSSOP and an ultra-small,
20-bump WLP package and are specified over the -40NC
to +125NC temperature range.
Applications
Programmable Voltage and Current Sources
Gain and Offset Adjustment
Automatic Tuning and Optical Control
Power Amplifier Control and Biasing
Process Control and Servo Loops
Portable Instrumentation
Benefits and Features
S Eight High-Accuracy DAC Channels
12-Bit Accuracy Without Adjustment
±1 LSB INL Buffered Voltage Output
Guaranteed Monotonic Over All Operating
Conditions
Independent Mode Settings for Each DAC
S Three Precision Selectable Internal References
2.048V, 2.500V, or 4.096V
S Internal Output Buffer
Rail-to-Rail Operation with External Reference
4.5µs Settling Time
Outputs Directly Drive 2kI Loads
S Small 6.5mm x 4.4mm 20-Pin TSSOP or Ultra-
Small 2.5mm x 2.3mm 20-Bump WLP Package
S Wide 2.7V to 5.5V Supply Range
S Separate 1.8V to 5.5V VDDIO Power-Supply Input
S Fast 400kHz I2C-Compatible, 2-Wire Serial
Interface
S Pin-Selectable Power-On-Reset to Zero-Scale or
Midscale DAC Output
S LDAC and CLR For Asynchronous DAC Control
S Three Software-Selectable Power-Down Output
Impedances
1kI, 100kI, or High Impedance
Functional Diagram
VDDIO
VDD REF
SCL
SDA
ADDR0
ADDR1
CLR
LDAC
IRQ
M/Z
I2C SERIAL
INTERFACE
WATCHDOG
TIMER
POR
INTERNAL REFERENCE/
EXTERNAL BUFFER
CODE
REGISTER
DAC
LATCH
8 -/10-/12-BIT
DAC
CODE
CLEAR /
RESET
LOAD
(GATE/
CLEAR /
RESET)
DAC CONTROL LOGIC
POWER-DOWN
GND
MAX5823
MAX5824
MAX5825
1 OF 8 DAC CHANNELS
BUFFER
100kI 1kI
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
For related parts and recommended products to use with this part,
refer to: www.maximintegrated.com/MAX5823.related
Ordering Information appears at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6185; Rev 2; 2/13
Free Datasheet http://www.datasheet4u.com/
1 page  
MAX5823/MAX5824/MAX5825
Ultra-Small, Octal Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 2.7V to 5.5V, VDDIO = 1.8V to 5.5V, VGND = 0V, CL = 200pF, RL = 2kI, TA = -40NC to +125NC, unless otherwise noted.)
(Note 3)
PARAMETER
REFERENCE INPUT
Reference Input Range
Reference Input Current
Reference Input Impedance
REFERENCE OUTPUT
Reference Output Voltage
Reference Temperature
Coefficient (Note 10)
Reference Drive Capacity
SYMBOL
CONDITIONS
VREF
IREF
RREF
VREF
VREF = VDD = 5.5V
VREF = 2.048V, TA = +25NC
VREF = 2.5V, TA = +25NC
VREF = 4.096V, TA = +25NC
MAX5825A
MAX5823/MAX5824/MAX5825B
External load
Reference Capacitive Load
Handling
Reference Load Regulation
Reference Line Regulation
POWER REQUIREMENTS
Supply Voltage
ISOURCE = 0 to 500FA
VDD
VREF = 4.096V
All other options
I/O Supply Voltage
Supply Current (Note 11)
VDDIO
IDD
VREF = 2.048V
Internal reference
VREF = 2.5V
VREF = 4.096V
External reference
VREF = 3V
VREF = 5V
All DACs off, internal reference ON
Power-Down Mode Supply
Current
All DACs off, internal reference OFF,
IPD TA = -40NC to +85NC
All DACs off, internal reference OFF,
TA = +125NC
Digital Supply Current
IDDIO Static logic inputs, all outputs unloaded
DIGITAL INPUT CHARACTERISTICS (SCL, SDA, ADDR0, ADDR1, LDAC, CLR, M/Z)
Input High Voltage (Note 11)
(All inputs except 2.2V < VDDIO < 5.5V
M/Z)
VIH
1.8V < VDDIO < 2.2V
2.7V < VDD < 5.5V (for M/Z)
MIN
1.24
75
2.043
2.494
4.086
4.5
2.7
1.8
0.7 x
VDDIO
0.8 x
VDDIO
0.7 x
VDD
TYP
55
100
2.048
2.500
4.096
Q3
Q10
25
200
2
0.05
1.6
1.7
2.0
1.6
1.9
140
0.7
2
MAX UNITS
VDD
V
74 FA
kI
2.053
2.506
4.106
Q10
Q25
V
ppm/NC
kI
pF
mV/mA
mV/V
5.5
5.5
V
5.5 V
2
2.1
2.5 mA
2.0
2.5
2 FA
4
1 FA
V
V
Maxim Integrated
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
MAX5823/MAX5824/MAX5825
Ultra-Small, Octal Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
Typical Operating Characteristics (continued)
(MAX5825, 12-bit performance, TA = +25°C, unless otherwise noted.)
CHANNEL-TO-CHANNEL FEEDTHROUGH
(VDD = VREF = 5V, TA = +25NC,
RL = 2kI, CL = 200pF)
MAX5823 toc24
TRANSITIONING DAC: 0 TO FULL SCALE
STATIC DAC: MIDSCALE
ANALOG CROSSTALK = 4.07nV*s
CHANNEL-TO-CHANNEL FEEDTHROUGH
(VDD = 5V, VREF = 4.096V (INTERNAL),
TA = +25NC, RL = 2kI, CL = 200pF)
MAX5823 toc25
TRANSITIONING DAC: 0 TO FULL SCALE
STATIC DAC: MIDSCALE
ANALOG CROSSTALK = 3.3nV*S
VOUT4
0.585 LSB/div
NO LOAD
VOUT4
0.585 LSB/div
NO LOAD
VOUT0
5V/div
LOADED
VOUT0
5V/div
LOADED
4µs /div
4µs/div
DIGITAL FEEDTHROUGH
(VDD = VREF = 5V, RL = 10kI)
MAX5823 toc26
DIGITAL CROSSTALK = 0.2nV*s
STATIC DAC MIDSCALE
VOUT_
2mV/div
20ns/div
OUTPUT LOAD REGULATION
10
8 VDD = VREF
6
4 VDD = 5V
2
0 VDD = 3V
-2
-4
-6
-8
-10
-30 -20 -10 0 10 20 30 40 50
IOUT (mA)
60
OUTPUT CURRENT LIMITING
500
400 VDD = VREF
300
200
100 VDD = 5V
0
-100 VDD = 3V
-200
-300
-400
-500
-30 -20 -10 0 10 20 30 40 50 60 70
IOUT (mA)
HEADROOM AT RAILS
vs. OUTPUT CURRENT (VDD = VREF)
5.00
4.50
4.00 VDD = 5V, SOURCING
3.50
DAC = FULL SCALE
3.00
2.50
2.00 VDD = 3V, SOURCING
1.50
1.00 VDD = 3V AND 5V
SINKING
0.50
0 DAC = ZERO SCALE
0123456789
IOUT (mA)
10
NOISE-VOLTAGE DENSITY vs. FREQUENCY
(DAC AT MIDSCALE)
350
VDD = 5V, VREF = 4.096V
300 INTERNAL
250 VDD = 5V, VREF = 2.5V
INTERNAL
200 VDD = 5V, VREF = 2.048V
INTERNAL
150
100
50
0
100
VDD = 5V, VREF = 3.5V
(EXTERNAL)
1k 10k
FREQUENCY (Hz)
100k
Maxim Integrated
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX5825.PDF ] | |
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