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PDF Z1051PI Data sheet ( Hoja de datos )

Número de pieza Z1051PI
Descripción AOZ1051PI
Fabricantes Alpha & Omega Semiconductors 
Logotipo Alpha & Omega Semiconductors Logotipo

Z1051PI image


1. - Buck Regulator - AOZ1051PI






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AOZ1051PI
EZBuck™ 3 A Synchronous Buck Regulator
General Description
The AOZ1051PI is a high efficiency, easy to use, 3 A
synchronous buck regulator. The AOZ1051PI works from
4.5 V to 18 V input voltage range, and provides up to 3 A
of continuous output current with an output voltage
adjustable down to 0.8 V.
The AOZ1051PI comes in an exposed pad SO-8
package and is rated over a -40 °C to +85 °C operating
ambient temperature range.
Features
z 4.5 V to 18 V operating input voltage range
z Synchronous Buck: 70 minternal high-side switch
and 40 minternal low-side switch (at 12 V)
z Up to 95 % efficiency
z External soft start
z Output voltage adjustable to 0.8 V
z 3 A continuous output current
z 500 kHz PWM operation
z Cycle-by-cycle current limit
z Pre-bias start-up
z Short-circuit protection
z Thermal shutdown
z Exposed pad SO-8 package
Applications
z Point of load DC/DC converters
z LCD TV
z Set top boxes
z DVD and Blu-ray players/recorders
z Cable modems
Typical Application
VIN
C1
10µF
RC
CC
CSS
VIN SS
EN
AOZ1051PI LX
COMP
FB
AGND
PGND
L1 4.7µH
R1
R2
VOUT
C2, C3
22µF
Rev. 1.0 June 2011
Figure 1. 3.3 V 3 A Synchronous Buck Regulator, Fs = 500 kHz
www.aosmd.com
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Z1051PI pdf
AOZ1051PI
Typical Performance Characteristics
Circuit of Figure 1. TA = 25 °C, VIN = VEN = 12 V, VOUT = 3.3 V unless otherwise specified.
Light Load Operation
Full Load Operation
Vin ripple
0.1V/div
Vo ripple
0.1V/div
IL
2A/div
VLX
10V/div
Vin ripple
0.5V/div
Vo ripple
0.1V/div
IL
2A/div
VLX
10V/div
2µs/div
Start Up to Full Load
Vin
5V/div
2µs/div
Short Circuit Protection
LVX
10V/div
2ms/div
50% to 100% Load Transient
Vo
2V/div
lin
2A/div
Vo
0.1V/div
Io
2A/div
20ms/div
Short Circuit Recovery
Vo
2V/div
IL
2A/div
VLX
10V/div
Vo
2V/div
IL
2A/div
100µs/div
20ms/div
Rev. 1.0 June 2011
www.aosmd.com
Page 5 of 14
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Z1051PI arduino
Layout Considerations
The AOZ1051PI is an exposed pad SO-8 package.
Several layout tips are listed for the best electric and
thermal performance.
1. The exposed pad (LX) is connected to the internal
PFET and NFET drains. Connected a large copper
plane to the LX pin to help thermal dissipation.
2. Do not use a thermal relief connection to the VIN pin
or the PGND pin. Pour a maximized copper area to
the PGND pin and the VIN pin to help thermal
dissipation.
3. The input capacitor should be connected as close as
possible to the VIN pin and the PGND pin.
4. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and only connect
them at one point to avoid the PGND pin noise
coupling to the AGND pin.
5. Make the current trace from the LX pad to L to Co to
the PGND as short as possible.
6. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
7. Keep sensitive signal trace away from the LX pad.
AOZ1051PI
Rev. 1.0 June 2011
www.aosmd.com
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