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NAU8401 Datasheet PDF - Nuvoton Technology

Part Number NAU8401
Description 24-bit Stereo Audio DAC
Manufacturers Nuvoton Technology 
Logo Nuvoton Technology Logo 



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NAU8401 datasheet, circuit
NAU8401
Description
24-bit Stereo Audio DAC with Speaker Driver
emPowerAudio
The NAU8401 is a low power, high quality audio output system for portable applications. In addition to
precision 24-bit stereo DACs, this device integrates a broad range of additional functions to simplify
implementation of complete audio systems. The NAU8401 includes drivers for speaker, headphone, and stereo
line outputs, and integrates mixing of the DAC outputs with analog input signals.
Advanced on-chip digital signal processing includes a 5-band equalizer, a 3-D audio enhancer, and a digital
limiter/dynamic range compressor function for the playback path. The digital interface can operate as either a
master or a slave. Additionally, an internal fractional-N PLL is available to generate accurate audio sample rate
clocks for the DAC derived from any available system clock from 8MHz through 33MHz.
The NAU8401 operates with analog supply voltages from 2.5V to 3.6V, while the digital core can operate as low
as 1.7V to reduce power. The loudspeaker BTL output pair and two auxiliary line outputs can use a 5V supply to
increase output power capability, enabling the NAU8401 to drive 1 Watt into an external speaker. Internal
control registers enable flexible power conserving modes, shutting down sub-sections of the chip under software
control.
The NAU8401 is specified for operation from -40°C to +85°C. AEC-Q100 & TS16949 compliant device is
available upon request.
Key Features
DAC: 94dB SNR and -84dB THD (“A” weighted)
Integrated BTL speaker driver: 1W into 8Ω
Integrated head-phone driver: 40mW into 16Ω
Integrated line inputs and line outputs
On-chip high resolution fractional-N PLL
Integrated DSP with specific functions:
5-band equalizer
3-D audio enhancement
Automatic level control
Audio level limiter/dynamic range compressor
Standard audio interfaces: PCM and I2S
Serial control interfaces with read/write capability
Supports audio sample rates from 8kHz to 48kHz
Applications
Personal Navigation Devices
Personal Media Players
Personal Navigation Devices
Portable Game Players
Portable TVs
Datasheet Rev 2.5
Page 1 of 69
March, 2014

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NAU8401 equivalent
NAU8401
Table of Contents
1 GENERAL DESCRIPTION .............................................................................................................................10
2 POWER SUPPLY.............................................................................................................................................12
3 INPUT PATH DETAILED DESCRIPTION....................................................................................................13
3.1 Analog Input Impedance and Variable Gain Stage Topology .....................................................................13
3.2 Programmable Reference Voltage Controls ...............................................................................................14
4 DAC DIGITAL BLOCK ..................................................................................................................................15
4.1 DAC Soft Mute ...........................................................................................................................................15
4.2 DAC AutoMute ...........................................................................................................................................15
4.3 DAC Sampling / Oversampling Rate, Polarity Control, Digital Passthrough ...............................................15
4.4 DAC Digital Volume Control and Update Bit Functionality .........................................................................16
4.5 DAC Automatic Output Peak Limiter / Volume Boost .................................................................................16
4.6 5-Band Equalizer........................................................................................................................................17
4.7 3D Stereo Enhancement ............................................................................................................................18
4.8 DAC Output A-law and µ-law Expansion...................................................................................................19
4.9 8-bit Word Length.......................................................................................................................................19
5 ANALOG OUTPUTS.......................................................................................................................................20
5.1 Main Mixers (LMAIN MIX and RMAIN MIX)................................................................................................20
5.2 Auxiliary Mixers (AUX1 MIXER and AUX2 MIXER)....................................................................................21
5.3 Right Speaker Submixer ............................................................................................................................21
5.4 Headphone Outputs (LHP and RHP) .........................................................................................................22
5.5 Speaker Outputs ........................................................................................................................................23
5.6 Auxiliary Outputs ........................................................................................................................................24
6 MISCELLANEOUS FUNCTIONS ..................................................................................................................24
6.1 Slow Timer Clock .......................................................................................................................................24
6.2 General Purpose Inputs and Outputs (GPIO1, GPIO2, GPIO3) and Jack Detection..................................25
6.3 Automated Features Linked to Jack Detection ...........................................................................................25
7 CLOCK SELECTION AND GENERATION ..................................................................................................26
7.1 Phase Locked Loop (PLL) General Description .........................................................................................27
7.2 CSB/GPIO1 as PLL output .........................................................................................................................28
8 CONTROL INTERFACES...............................................................................................................................29
8.1 Software Reset...........................................................................................................................................29
8.2 Selection of Control Mode ..........................................................................................................................29
8.3 2-Wire-Serial Control Mode (I2C Style Interface)........................................................................................29
8.4 2-Wire Protocol Convention........................................................................................................................30
8.5 2-Wire Write Operation...............................................................................................................................31
8.6 2-Wire Read Operation ..............................................................................................................................32
8.7 SPI Control Interface Modes ......................................................................................................................33
8.8 SPI 3-Wire Write Operation ........................................................................................................................33
8.9 SPI 4-Wire 24-bit Write and 32-bit Read Operation...................................................................................33
8.10 SPI 4-Wire Write Operation ......................................................................................................................34
8.11 SPI 4-Wire Read Operation........................................................................................................................35
9 DIGITAL AUDIO INTERFACES ...................................................................................................................36
9.1 Right-Justified Audio Data ..........................................................................................................................36
9.2 Left-Justified Audio Data ............................................................................................................................37
9.3 I2S Audio Data............................................................................................................................................37
9.4 PCM A Audio Data .....................................................................................................................................38
Datasheet Rev 2.5
Page 5 of 69
March, 2014

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Information Total 30 Pages
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