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What is 71M6541F?

This electronic component, produced by the manufacturer "Teridian Semiconductor", performs the same function as "Energy Meter ICs".


71M6541F Datasheet PDF - Teridian Semiconductor

Part Number 71M6541F
Description Energy Meter ICs
Manufacturers Teridian Semiconductor 
Logo Teridian Semiconductor Logo 


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19-5376; Rev 1.1; 4/11
A Maxim Integrated Products Brand
71M6541D/71M6541F/71M6542F
Energy Meter ICs
DATA SHEET
April 2011
GENERAL DESCRIPTION
FEATURES
The 71M6541D/71M6541F/71M6542F are Teridian’s 4th-generation
single-phase metering SoCs with a 5MHz 8051-compatible MPU core,
low-power RTC with digital temperature compensation, flash memory,
and LCD driver. Our Single Converter Technology® with a 22-bit delta-
sigma ADC, three or four analog inputs, digital temperature com-
pensation, precision voltage reference, and a 32-bit computation
engine (CE) supports a wide range of metering applications with
very few external components.
The 71M6541D/71M6541F/71M6542F support optional interfaces to
the Teridian 71M6x01 series of isolated sensors, which offer BOM
cost reduction, immunity to magnetic tamper, and enhanced
reliability. Other features include an SPI™ interface, advanced
power management, ultra-low-power operation in active and battery
modes, 3/5KB shared RAM and 32/64KB of flash memory that can be
programmed in the field with code and/or data during meter
operation and the ability to drive up to six LCD segments per SEG
driver pin. High processing and sampling rates combined with
differential inputs offer a powerful metering platform for residential
meters.
A complete array of code development tools, demonstration code,
and reference designs enable rapid development and certification of
meters that meet all ANSI and IEC electricity metering standards
worldwide.
Shunt
NEUTRAL
Shunt
LOAD
Note:
LINE This system is referenced to LINE
NEUTRAL
LINE
POWER SUPPLY
0.1% Accuracy Over 2000:1 Current Range
Exceeds IEC 62053/ANSI C12.20 Standards
Two Current Sensor Inputs with Selectable
Differential Mode
Selectable Gain of 1 or 8 for One Current Input
to Support Shunts
High-Speed Wh/VARh Pulse Outputs with
Programmable Width
32KB Flash, 3KB RAM (71M6541D)
64KB Flash, 5KB RAM (71M6541F/42F)
Up to Four Pulse Outputs with Pulse Count
Four-Quadrant Metering
Digital Temperature Compensation:
- Metrology Compensation
- Accurate RTC for TOU Functions with
Automatic Temperature Compensation
for Crystal in All Power Modes
Independent 32-Bit Compute Engine
46-64Hz Line Frequency Range with the Same
Calibration
Phase Compensation (±10°)
Three Battery-Backup Modes:
- Brownout Mode (BRN)
- LCD Mode (LCD)
- Sleep Mode (SLP)
Wake-Up on Pin Events and Wake-On Timer
1µA in Sleep Mode
www.DataSheet4U.net TERIDIAN
71M6xx1
Pulse
Trans-
former
AMR
IR
HOST
MUX and ADC V3P3A V3P3SYS GNDA GNDD
IAP PWR MODE
IAN CONTROL
TERIDIAN WAKE-UP
71M6541D/F REGULATOR
VBAT
VA
VBAT_RTC
IBP TEMPERATURE BATTERY
IBN
SENSOR
MONITOR
VREF
SERIAL PORTS
TX
RX
MODUL- RX
ATOR TX
POWER FAULT
COMPARATOR
SPI INTERFACE
RAM
COMPUTE
ENGINE
FLASH
MEMORY
MPU
RTC
TIMERS
ICE
COM0...5
SEG
SEG/DIO
LCD DRIVER
DIO, PULSES
DIO
V3P3D
OSCILLATOR/
PLL XIN
XOUT
BATTERY
RTC
BATTERY
LCD DISPLAY
8888.8888
PULSES,
DIO
I2C or µWire
EEPROM
32 kHz
Flash Security
In-System Program Update
8-Bit MPU (80515), Up to 5 MIPS
Full-Speed MPU Clock in Brownout Mode
LCD Driver:
- Up to 6 Commons/Up to 56 Pins
5V LCD Driver with DAC
Up to 51 Multifunction DIO Pins
Hardware Watchdog Timer (WDT)
I2C/MICROWIRE™ EEPROM Interface
SPI Interface with Flash Program Capability
Two UARTs for IR and AMR
IR LED Driver with Modulation
Industrial Temperature Range
11/5/2010
Single Converter Technology is a registered trademark of Maxim Integrated
Products, Inc.
SPI is a trademark of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
64-Pin (71M6541D/71M6541F) and 100-pin
(71M6542F) Lead(Pb)-Free LQFP Package
v1.1 © 2008–2011 Teridian Semiconductor Corporation 1

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71M6541F equivalent
Figures
Figure 1: IC Functional Block Diagram.....................................................................................................9
Figure 2. 71M6541D/F AFE Block Diagram (Local Sensors) .................................................................. 12
Figure 3. 71M6541D/F AFE Block Diagram with 71M6x01 ..................................................................... 13
Figure 4. 71M6542F AFE Block Diagram (Local Sensors)...................................................................... 13
Figure 5. 71M6542F AFE Block Diagram with 71M6x01......................................................................... 14
Figure 6: States in a Multiplexer Frame (MUX_DIV[3:0] = 3) .................................................................. 17
Figure 7: States in a Multiplexer Frame (MUX_DIV[3:0] = 4) .................................................................. 17
Figure 8: General Topology of a Chopped Amplifier............................................................................... 21
Figure 9: CROSS Signal with CHOP_E = 00........................................................................................... 21
Figure 10: RTM Timing .......................................................................................................................... 26
Figure 11: Timing relationship between ADC MUX, CE, and RTM Serial Transfer .................................. 26
Figure 12. Pulse Generator FIFO Timing ............................................................................................... 28
Figure 13: Accumulation Interval............................................................................................................ 29
Figure 14: Samples from Multiplexer Cycle (MUX_DIV[3:0] = 3)............................................................. 30
Figure 15: Samples from Multiplexer Cycle (MUX_DIV[3:0] = 4)............................................................. 30
Figure 16: Interrupt Structure................................................................................................................. 47
Figure 17: Automatic Temperature Compensation ................................................................................. 54
Figure 18: Optical Interface.................................................................................................................... 58
Figure 19: Optical Interface (UART1) ..................................................................................................... 59
Figure 20: Connecting an External Load to DIO Pins ............................................................................. 60
Figure 21: LCD Waveforms ................................................................................................................... 68
Figure 22: 3-wire Interface. Write Command, HiZ=0.............................................................................. 72
Figure 23: 3-wire Interface. Write Command, HiZ=1.............................................................................. 72
Figure 24: 3-wire Interface. Read Command......................................................................................... 72
Figure 25: 3-Wire Interface. Write Command when CNT=0................................................................... 73
Figure 26: 3-wire Interface. Write Command when HiZ=1 and WFR=1.................................................. 73
Figure 27: SPI Slave Port - Typical Multi-Byte Read and Write operations.............................................. 75
Figure 28: Voltage, Current, Momentary and Accumulated Energy......................................................... 80
Figure 29: Operation Modes State Diagram ........................................................................................... 81
Figure 30: MPU/CE Data Flow............................................................................................................... 91
Figure 31: Resistive Voltage Divider (Voltage Sensing).......................................................................... 92
Figure 32. CT with Single-Ended Input Connection (Current Sensing).................................................... 92
Figure 33: CT with Differential Input Connection (Current Sensing) ........................................................ 92
Figure 34: Differential Resistive Shunt Connections (Current Sensing)................................................... 92
www.DataSheet4U.net
Figure 35. 71M6541D/F with Local Sensors........................................................................................... 93
Figure 36: 71M6541D/F with 71M6x01 isolated Sensor.......................................................................... 94
Figure 37: 71M6542F with Local Sensors .............................................................................................. 95
Figure 38: 71M6542F with 71M6x01 Isolated Sensor............................................................................. 96
Figure 39: I2C EEPROM Connection.................................................................................................... 100
Figure 40: Connections for UART0 ...................................................................................................... 101
Figure 41: Connection for Optical Components.................................................................................... 102
Figure 42: External Components for the RESET Pin: Push-Button (Left), Production Circuit (Right)......... 102
Figure 43: External Components for the Emulator Interface ................................................................. 103
Figure 44: CE Data Flow: Multiplexer and ADC.................................................................................... 136
Figure 45: CE Data Flow: Scaling, Gain Control, Intermediate Variables .............................................. 136
Figure 46: CE Data Flow: Squaring and Summation Stages................................................................. 137
Figure 51: 64-pin LQFP Package Outline............................................................................................. 153
Figure 52: 100-pin LQFP Package Outline........................................................................................... 154
Figure 53: Pinout for the 71M6541D/F (LQFP-64 Package) ................................................................. 155
Figure 54: Pinout for the 71M6542F (LQFP-100 Package) ................................................................... 156
Figure 55: I/O Equivalent Circuits......................................................................................................... 161
v1.1
© 2008–2011 Teridian Semiconductor Corporation
5


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