|
|
Número de pieza | TC59YM916BKG32A | |
Descripción | 512-megabit XDRTM DRAM The Rambus XDRTM DRAM device | |
Fabricantes | Toshiba America Electronic | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TC59YM916BKG32A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! TC59YM916BKG24A,32A,32B,40B,32C,40C
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT
OVERVIEW
SILICON MONOLITHIC
Lwewawd.DaFtareSheeet4U.com
The Rambus XDRTM DRAM device is a general purpose high-performance memory device suitable for use in a
broad range of applications including computer memory, graphics, video, and any other application where high
bandwidth and low latency are required.
The 512Mb Rambus XDR DRAM device is a CMOS DRAM organized as 32M words by 16 bits. The use of
Differential Rambus Signaling Level (DRSL) technology permits 4000/3200/2400 Mb/s transfer rates while using
conventional system and board design technologies. XDR DRAM devices are capable of sustained data transfers of
8000/6400/4800 MB/s.
XDR DRAM device architecture allows the highest sustained bandwidth for multiple, interleaved randomly
addressed memory transactions. The highly efficient protocol yields over 95% utilization while allowing fine access
granularity. The device's 8 banks support up to four interleaved transactions.
FEATURES
• Highest pin bandwidth available
− 4000/3200/2400 Mb/s Octal Data Rate (ODR) Signaling
− Bi-directional differential RSL (DRSL)
Flexible read/write bandwidth allocation
Minimum pin count
− Programmable on-chip termination
Adaptive impedance matching
Reduced system cost and routing complexity
• Highest sustained bandwidth per DRAM device
− 8000/6400/4800 MB/s sustained data rate
− 8 banks: bank-interleaved transactions at full bandwidth
− Dynamic request scheduling
− Early-Read-after-Write support for maximum efficiency
− Zero overhead refresh
• Low latency
− 2.0/2.5/3.33 ns request packets
− Point-to-point data interconnect for fastest possible flight time
− Support for low-latency, fast-cycle cores
• Low power
− 1.8V VDD
− Programmable small-swing I/O signaling (DRSL)
− Low power PLL/DLL design
− Power Down Self Refresh support
− Per pin I/O Power Down for narrow-width operation
• Programmable I/O width
− ×4 / ×8 / ×16 programmable device I/O width
• Lead Free
Note: XDR is a trademark or a registered trademark in Japan and/or other countries.
Rev 0.1
2004-12-15 1/76
1 page TC59YM916BKG24A,32A,32B,40B,32C,40C
Table of Tables
www.DataSheet4U.com
Table 1. Pin Descriptions------------------------------------------------------------------------------------------------------ 7
Table 2. Request Field Description---------------------------------------------------------------------------------------- 10
Table 3. OP Field Encoding Summary------------------------------------------------------------------------------------12
Table 4. ROP Field Encoding Summary----------------------------------------------------------------------------------12
Table 5. POP Field Encoding Summary----------------------------------------------------------------------------------13
Table 6. XOP Field Encoding Summary----------------------------------------------------------------------------------13
Table 7. Packet Interaction Summary------------------------------------------------------------------------------------ 14
Table 8. SCMD Field Encoding Summary------------------------------------------------------------------------------- 33
Table 9. Initialization Timing Parameters--------------------------------------------------------------------------------48
Table 10. WDSL-to-Core/DQ/SC Map (First Generation ×16/×8/×4 XDR DRAM, BL = 16)---------------- 50
Table 11. Core Data Word-to WDSL Format------------------------------------------------------------------------51
Table 12. Electrical Conditions--------------------------------------------------------------------------------------------- 59
Table 13. Timing Conditions------------------------------------------------------------------------------------------------- 60
Table 14. Electrical Characteristics--------------------------------------------------------------------------------------- 61
Table 15. Supply Current Profile------------------------------------------------------------------------------------------- 62
Table 16. Timing Characteristics------------------------------------------------------------------------------------------- 62
Table 17. Timing Parameters-------------------------------------------------------------------------------------------- 63,64
Table 18. Package RSL Parasitic Summary---------------------------------------------------------------------------- 73
Table 19. CSP x16 Package Mechanical Parameters---------------------------------------------------------------- 75
Rev 0.1
2004-12-15 5/76
5 Page TC59YM916BKG24A,32A,32B,40B,32C,40C
Figure 3. Request Packet Formats
www.DataSheet4U.com
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23
CFM
CFMN
tCYCLE
RQ11
…RQ0
ACT
a0
RD
WRM
PRE
PDN
a1 a2 a3
DQ15…0
DQN15…0
CFM
CFMN
RQ11
RQ10
RQ9
RQ8
RQ7
RQ6
RQ5
RQ4
RQ3
RQ2
RQ1
RQ0
ROWA Packet
tCYCLE
OP DEL
3A
OP R
28
RR
97
RR
10 6
RR
11 5
rsrv R
4
rsrv R
3
rsrv R
2
rsrv R
1
BA R
20
BA rsrv
1
BA rsrv
0
COL Packet
tCYCLE
OP DEL
3C
OP rsrv
2
OP rsrv
1
OP rsrv
0
WR C
X7
CC
86
CC
95
rsrv C
4
rsrv SC
3
BC SC
22
BC SC
11
BC SC
00
COLM Packet
tCYCLE
ROWP Packet
tCYCLE
COLX Packet
tCYCLE
OP M
37
MM
36
MM
25
MM
14
MC
07
CC
86
CC
95
rsrv C
4
rsrv SC
3
BC SC
22
BC SC
11
BC SC
00
OP POP
32
OP ROP
22
OP ROP
11
OP ROP
00
POP RA
17
POP RA
06
rsrv RA
5
rsrv RA
4
rsrv RA
3
BP RA
22
BP RA
11
BP RA
00
OP rsrv
3
OP rsrv
2
OP rsrv
1
OP rsrv
0
rsrv rsrv
rsrv rsrv
rsrv rsrv
rsrv rsrv
XOP rsrv
3
XOP rsrv
2
XOP rsrv
1
XOP rsrv
0
Rev 0.1
2004-12-15 11/76
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet TC59YM916BKG32A.PDF ] |
Número de pieza | Descripción | Fabricantes |
TC59YM916BKG32A | 512-megabit XDRTM DRAM The Rambus XDRTM DRAM device | Toshiba America Electronic |
TC59YM916BKG32B | 512-megabit XDRTM DRAM The Rambus XDRTM DRAM device | Toshiba America Electronic |
TC59YM916BKG32C | 512-megabit XDRTM DRAM The Rambus XDRTM DRAM device | Toshiba America Electronic |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |