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PDF A6219DS Data sheet ( Hoja de datos )
| Número de pieza | A6219DS | |
| Descripción | Dual Full-Bridge PWM Motor Driver | |
| Fabricantes | Allegro MicroSystems | |
| Logotipo |  |
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A6219DS
www.DataSheet4U.com
Dual Full-Bridge PWM Motor Driver
Features and Benefits
▪ Interchangeable with SGS L6219DS
▪ 750 mA Continuous Output Current
▪ 45 V Output Sustaining Voltage
▪ Internal Clamp Diodes
▪ Internal PWM Current Control
▪ Low Output Saturation Voltage
▪ Internal Thermal Shutdown Circuitry
▪ Similar to Dual PBL3717, UC3770
Package: 24 pin SOICW (suffix LB)
Not to scale
Description
The L6219DS motor driver is designed to drive both windings
of a bipolar stepper motor or bidirectionally control two DC
motors. Both bridges are capable of sustaining 45 V and include
internal pulse-width modulation (PWM) control of the output
current to 750 mA. The outputs have been optimized for a low
output saturation voltage drop (less than 1.8 V total source
plus sink at 500 mA).
For PWM current control, the maximum output current is
determined by user selection of a reference voltage and sensing
resistor. Two logic-level inputs select output current limits of
0, 33, 67, or 100% of the maximum level. A PHASE input to
each bridge determines load current direction.
The bridges include both ground clamp and flyback diodes for
protection against inductive transients. Internally generated
delays prevent crossover currents when switching current
direction. Special power-up sequencing is not required.Thermal
protection circuitry disables the outputs if the chip temperature
exceeds safe operating limits.
The L6219DS is supplied in a 24-pin surface-mountable SOIC,
with 4 internally-fused leads for maximum package power
dissipation in the smallest possible construction. It is lead (Pb)
free with 100% matte tin leadframe plating.
29319.43H
Typical Application
STEPPER
MOTOR
1
RS
CC
2
3
RC
4
5
6
2
7
FROM
μP
VREF
56 k7
RT
8
99
10 Q 2
11
12
820 pF
CT
VBB
1
24
23
RC
22
21
RS
CC
VBB
+
20
19
18
17
Q1 16
15
14
VCC 13
FROM
μP
VREF
+5 V
820 pF
CT
56 k7
RT
Dwg. EP-008B1
1 page  
L6219DS
Dual Full-Bridge PWM Motor Driverwww.DataSheet4U.com
Applications Information
PWM Current Control
The L6219DS dual bridge is designed to drive both windings of
a bipolar stepper motor. Output current is sensed and controlled
independently in each bridge by an external sense resistor (RS),
internal comparator, and monostable multivibrator.
When the bridge is turned on, current increases in the motor
winding and it is sensed by the external sense resistor until
the sense voltage (VCOMPIN) reaches the level set at the
comparator’s input:
ITRIP = VREF/10 RS
The comparator then triggers the monostable which turns off
the source driver of the bridge. The actual load current peak
will be slightly higher than the trip point (especially for low-
inductance loads) because of the internal logic and switching
delays. This delay (td) is typically 2 μs. After turn-off, the
motor current decays, circulating through the ground-clamp
diode and sink transistor. The source driver’s off time (and
therefore the magnitude of the current decrease) is determined
by the monostable’s external RC timing components, where
toff = RTCT within the range of 20 kΩ to 100 kΩ and 100 pF to
1000 pF.
The fixed-off time should be short enough to keep the current
chopping above the audible range (< 46 μs) and long enough to
properly regulate the current. Because only slow-decay current
control is available, short off times (< 10 μs) require additional
efforts to ensure proper current regulation. Factors that can
negatively affect the ability to properly regulate the current
when using short off times include: higher motor-supply
voltage, light load, and longer than necessary blank time.
When the source driver is re-enabled, the winding current (the
sense voltage) is again allowed to rise to the comparator’s
threshold. This cycle repeats itself, maintaining the average
motor winding current at the desired level.
Loads with high distributed capacitances may result in high
turn-on current peaks. This peak (appearing across RS) will
attempt to trip the comparator, resulting in erroneous current
control or high-frequency oscillations. An external RCCC
time delay should be used to further delay the action of the
comparator. Depending on load type, many applications will
not require these external components (SENSE connected to
COMP IN).
PWM Output Current Wave Form
V PHAS E
+
I OUT
0
–
ITR IP
td toff
Dwg. WM-003-1A
Load Current Paths
V
BB
BR IDGE ON
R S S OUR CE OFF
ALL OFF
Dwg. E P -006-1
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet A6219DS.PDF ] | |
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