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PDF AMIS-734024 Data sheet ( Hoja de datos )
| Número de pieza | AMIS-734024 | |
| Descripción | Wide Aperture Spectroscopic Photodiode Arrays | |
| Fabricantes | AMI SEMICONDUCTOR | |
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AMIS-734256, AMIS-734512, AMIS-734024
25µm-pitch Wide Aperture Spectroscopic Photodiode Arrays
Data Sheet
1.0 Description
AMI Semiconductor’s HSN series is family of self-scanning photodiode solid-state linear imaging arrays. These photodiode sensors
employ AMI Semiconductor’s proprietary CMOS image sensing technology to integrate the sensors into a single monolithic chip. These
sensors are optimally designed for applications in spectroscopy. Accordingly, these sensors contain a linear array of photodiodes with
an optimized geometrical aspect ratio (25µm aperture pitch x 2500µm aperture width) for helping to maintain mechanical stability in
spectroscopic instruments and for providing a large light-capturing ability. The family of sensors consists of photodiode arrays of various
lengths, 256, 512, and 1024 pixels.
The HSN photodiode arrays are mounted in 22-pin ceramic side-brazed dual-in-line packages, which fit in standard DIP sockets. A
diagram of its pin-out configuration is seen in Figure 1.
www.DataSheet4U.com
Figure 1: Pin Out Configuration
AMI Semiconductor – Aug. 06, M-20603-001
www.amis.com
1
1 page  
AMIS-734256, AMIS-734512, AMIS-734024
25µm-pitch Wide Aperture Spectroscopic Photodiode Arrays
Data Sheet
Figure 5: Simplified Circuit Diagram of an HSN Photodiode Array
The diagram in Figure 5 does not include the capacitor bank and the anti-blooming circuitry.
7.0 I/O Pins
Besides the VSS and VDD supply pins, there are nine functionally active I/O pins. Only two clocks, CLK and START, are required for
controlling the timing of the sensor's video readout. One additional digital input, ADDCAP controls the bank of capacitors as described
in the Section 6.0. The digital output, EOS, marks the end of the line-scan. The charge output pin, QOUT, is typically connected to a
charge-integrating amplifier, which is biased to Vbias (see Section 8.0). For normal anti-blooming operation, the ABG requires a 0.1µF
capacitor connected to VSS and the ABD is also biased to Vbias. Each temperature diode is operated with a small constant current,
which forward biases its PN junction. By measuring the forward-bias voltage, one can track the silicon die temperature. The
wwtewm.DpaetaraSthueret4dUio.cdoems may be disabled by connecting their anodes to VSS. These I/Os are listed with their acronym designators and
functional descriptions in Table 1.
Table 1: Symbols and Functions and I/O Pins
Symbol
Function and Description
VSS
Ground
VDD
+5.0V
START
Start pulse: input to start the line scan
CLK Clock pulse: input to clock the shift register
ADDCAP
Add capacitors: input that selects the bank of capacitors to increase charge capacity
EOS
End of scan: output from the shift register to indicate the completion of one line scan
QOUT
Video charge output: output from the photodiodes pixels
ABG
Anti-blooming gate: self-biased gate for setting anti-blooming level. Requires 0.1-µF connected to VSS
ABD
Anti-blooming drain: bias for anti-blooming drain, set to Vbias
TD1 Temperature Diode 1: anode of temperature Diode 1
TD2 Temperature Diode 2: anode of temperature Diode 2
NC No connection
AMI Semiconductor – Aug. 06, M-20603-001
www.amis.com
5
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