ISL837030 Datasheet PDF - Intersil Corporation
|Description||(ISL837030 / ISL83740) Modem Reference Designs|
There is a preview and ISL837030 download ( pdf file ) link at the bottom of this page.
Total 25 Pages
Preview 1 page
No Preview Available !
The ISL837030 and ISL83740 Broadband Wireless Modem
Reference Designs support a wide range of modulation
orders and symbol rates.*
In both Reference Designs, sophisticated coding,
equalization, and symbol recovery techniques are employed,
resulting in robust wireless link performance.
The ISL837030 and ISL83740 Reference Designs support
high-capacity digital microwave radios with data rates up to
238Mbps (ISL83740) and 160Mbps (ISL837030). They
provide a flexible, high performance, economical solution for
fixed wireless applications.
* Differences between the ISL837030 and ISL83740 are marked in text as
needed. Also see Release Notes on page 25.
• Eliminates the need to develop custom ASICs
• Optimizes wireless link capacity and Bit Error Rate (BER)
• Enables rapid prototyping and compliance testing
• Proven technology
• Optional Evaluation Kit supports demo requirements,
performance evaluation, and lab testing
• Programmable modulation
Both: QPSK, 8PSK, 16QAM, 32QAM
ISL83740 only: 64QAM, 128QAM
• Flexible data rates
ISL83740: up to 238Mbps
ISL837030: up to 160Mbps
• Programmable symbol rates
• Reed Solomon (RS) encoding/decoding
• Concatenated coding using RS and PTCM inner code
• FCC and ETSI spectral mask compliance
• Powerful equalization
• Sample ISL87060MIK Modulator and ISL87060DIK
Demodulator Chip Sets for development and test.
• Complete Manufacturing Documentation Package: Bill of
Materials, Schematics, PCBA Fabrication Files, including
• Test Documentation.
• Embedded Monitor and Control Software provides
comprehensive setup and test capabilities. Accepts
commands in binary or ASCII format.
Optional Evaluation Kit
The modem PCBA is mounted on an Evaluation Platform,
allowing the modem to be set up and tested in a standard lab
environment. Includes VHF and L-band IF Interfaces and a
sophisticated Graphical User Interface for Windows
operating systems. (ISL83700EVAL/ISL83740EVAL)
FIGURE 1 Simplified Block Diagram
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
CommLink™ is a trademark of Intersil Americas Inc.
The modulator accepts byte-wide parallel data, encodes it,
digitizes it, and produces a balanced analog signal output.
This signal can then be up-converted to whatever RF/IF
frequency the application requires. It consists of four
1. ISL87060MIK Modulator ASSP
The modulator ASSP provides a digital representation of a
modulated analog signal. The chip accepts byte-wide TTL
data and applies:
• Energy Dispersal
• Reed-Solomon Forward Error Correction (FEC)
• Convolutional Interleaving
• Symbol Generation for various modulation formats with
or without Convolutional Coding
• Pulse Shaping
The digital output from the ASSP consists of eight 10-bit
ports, four for I and four for Q. Each port represents at least
one of four samples per symbol which requires multiplexing
before it is applied to the Digital to Analog Converter (DAC).
2. Digital to Analog Converter (DAC)
The DAC section muxes each of the four 10-bit ports and
converts them into an analog signal representation of the
digital values produced by the ASSP. The DAC samples at a
minimum of four samples per symbol based on the ASSP’s
TrimDACs, controlled by the processor, provide fine
www.DatdajSuhsetmete4nUt.coofmthe amplitude and DC offset of the I and Q
output signals. Two of the TrimDACs control the reference
voltage used by the output DACs, thereby adjusting the
output signal amplitude. The default setting corresponds to a
3. Low Pass Filter (LPF)
The analog signal from the DAC is then filtered to eliminate
undesired digitizing effects. The TrimDAC is used to control
the offset voltage of the output signal, allowing the user to
adjust the balance between the I and Q baseband output
signals for upconverter optimization.
4. Rate Exchange
The Rate Exchange function generates clocks by converting
the byte-wide interface clock to an ASSP processing clock. It
then provides the sample clocks to the DAC and Mux
sections. The relationship between the byte clock input and
the other clocks varies dramatically depending on the FEC
and Interpolator settings within the ASSP.
The demodulator accepts differential analog baseband I and
Q signals, then filters, decodes, corrects, and converts them
to byte-wide digital data and clock. It consists of six functions:
1. Low Pass Filter (LPF)
The LPF eliminates any undesired baseband high frequency
artifacts caused by the down conversion process.
The Analog to Digital Converter (ADC) provides a digital
representation of the modulated baseband analog signal. It
provides eight bits of data for each of the I and Q channels.
3. FPGA Decimating Filter
A Field Programmable Gate Array (FPGA) based Decimating
Matched Filter is provided for additional filtering based on the
desired symbol rate. Multiple FPGA designs are required to
cover the full symbol range. They are stored in the
processor’s FLASH memory and loaded as required, based
on configuration parameters. The modem automatically
toggles between the FPGA designs depending on the baud
4. ISL87060DIK Demodulator ASSP
The demodulator ASSP accepts quantized baseband I and Q
signals and provides all necessary demodulation functions
• Carrier and Symbol Acquisition and Tracking
• Adaptive Equalization
• Data Estimation
• Convolutional Deinterleaving
• Energy Dispersal Removal
• Decoding Functions, including Reed-Solomon
5. Baseband Loopback
The modulator baseband output can be configured to be
connected to the input of the demodulator. This allows in-
system functional verification of the modem. The loop-back
circuit is implemented with a fully differential buffered/switch
circuit. When engaged, the loop-back signals are summed
with the normal I and Q input signals to the demodulator. This
configuration does not require that either the normal
modulator I/Q outputs or the normal demodulator I/Q inputs
be disconnected. Operation is transparent to the normal
loading on these interfaces.
The loop-back signals are summed with the
normal input signals. Therefore, when loopback
is enabled the system must be set to minimize
the signal input from the normal demodulator I/Q
Preview 5 Page
On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for ISL837030 electronic component.
|Information||Total 25 Pages|
|Link URL||[ Copy URL to Clipboard ]|
|Download||[ ISL837030.PDF Datasheet ]|
Share Link :
Electronic Components Distributor
An electronic components distributor is a company that sources, stocks, and sells electronic components to manufacturers, engineers, and hobbyists.
|SparkFun Electronics||Allied Electronics||DigiKey Electronics||Arrow Electronics|
|Mouser Electronics||Adafruit||Newark||Chip One Stop|
|ISL837030||The function is (ISL837030 / ISL83740) Modem Reference Designs.|
Semiconductors commonly used in industry:
Quick jump to: