XR16M781 Datasheet PDF ( Pinout )

XR16M781 Datasheet PDF - Exar Corporation

Part Number	*XR16M781*
Description	1.62V TO 3.63V UART
Manufacturers	Exar Corporation
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XR16M781

1.62V TO 3.63V UART WITH 64-BYTE FIFO AND VLIO INTERFACE

AUGUST 2009

REV. 1.0.1

GENERAL DESCRIPTION

The XR16M7811 (M781) is an enhanced Universal

Asynchronous Receiver and Transmitter (UART) with

a VLIO bus interface and has 64 bytes of transmit

and receive FIFOs, programmable transmit and

receive FIFO trigger levels, automatic hardware and

software flow control, and data rates of up to 20 Mbps

at 3.3V, 16 Mbps at 2.5V and 10 Mbps at 1.8V with

4X data sampling rate.

The Auto RS-485 Half-Duplex Direction control

feature simplifies both the hardware and software for

half-duplex RS-485 applications. In addition, the

Multidrop mode with Auto Address detection

increases the performance by simplifying the

software routines.

The Independent TX/RX Baud Rate Generator

feature allows the transmitter and receiver to operate

at different baud rates. Power consumption of the

M781 can be minmized by enabling the sleep mode

and PowerSave mode.

The M781 has a 16550 compatible register set that

provide users with operating status and control,

receiver error indications, and modem serial interface

controls. An internal loopback capability allows

onboard diagnostics. The M781 is available in 24-pin

QFN, 32-pin QFN and 25-pin BGA packages.

NOTE: 1 Covered by U.S. Patent #5,649,122.

www.DataSheet4U.com

FEATURES

• VLIO bus interface

• Pin-to-pin compatible with SC16C850V and

SC16C850SV in 32-QFN package

• 20 Mbps maximum data rate

• Programmable TX/RX FIFO Trigger Levels

• TX/RX FIFO Level Counters

• Independent TX/RX Baud Rate Generator

• Fractional Baud Rate Generator

• Auto RTS/CTS Hardware Flow Control

• Auto XON/XOFF Software Flow Control

• Auto RS-485 Half-Duplex Direction Control

• Multidrop mode w/ Auto Address Detect

• Sleep Mode with Automatic Wake-up

• PowerSave mode

• Infrared (IrDA 1.0 and 1.1) mode

• 1.62V to 3.63V supply operation

• Crystal oscillator or external clock input

APPLICATIONS

• Personal Digital Assistants (PDA)

• Cellular Phones/Data Devices

• Battery-Operated Devices

• Global Positioning System (GPS)

• Bluetooth

FIGURE 1. XR16M781 BLOCK DIAGRAM

PwrSave

LLA#

AD7:AD0

IOR#

IO W #

CS#

INT

RESET#

VLIO Bus

Interface

BRG 64 Byte TX FIFO

UART

IR TX &

Regs ENDEC RX

BRG

64 Byte RX FIFO

Crystal Osc/Buffer

VCC

(1.62 to 3.63 V)

GND

TX, RX,

RTS#, CTS#,

DTR#, DSR#,

RI#, CD#

XTAL1

XTAL2

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com

XR16M781

REV. 1.0.1

1.62V TO 3.63V UART WITH 64-BYTE FIFO AND VLIO INTERFACE

1.0 PRODUCT DESCRIPTION

The XR16M781 (M781) is a high performance single-channel UART with a VLIO bus interface. It has its set of

device configuration registers. The configuration registers set is 16550 UART compatible for control, status

and data transfer. Additionally, the M781 channel has 64 bytes of transmit and receive FIFOs, Automatic RTS/

CTS Hardware Flow Control, Automatic Xon/Xoff and Special Character Software Flow Control, infrared

encoder and decoder (IrDA ver 1.0 and 1.1), programmable fractional baud rate generator with a prescaler of

divide by 1 or 4, and data rate up to 20 Mbps. The XR16M781 can operate from 1.62 to 3.63 volts. The M781

is fabricated with an advanced CMOS process.

Larger FIFO

The M781 provides a solution that supports 64 bytes of transmit and receive FIFO memory, instead of 16 bytes

in the XR16L580. The M781 is designed to work with high performance data communication systems, that

requires fast data processing time. Increased performance is realized in the M781 by the larger transmit and

receive FIFOs, FIFO trigger level control and automatic flow control mechanism. This allows the external

processor to handle more networking tasks within a given time. For example, the XR16L580 with a 16 byte

FIFO, unloads 16 bytes of receive data in 1.53 ms (This example uses a character length of 11 bits, including

start/stop bits at 115.2Kbps). This means the external CPU will have to service the receive FIFO at 1.53 ms

intervals. However with the 64 byte FIFO in the M781, the data buffer will not require unloading/loading for 6.1

ms. This increases the service interval giving the external CPU additional time for other applications and

reducing the overall UART interrupt servicing time. In addition, the programmable FIFO level trigger interrupt

and automatic hardware/software flow control is uniquely provided for maximum data throughput performance

especially when operating in a multi-channel system. The combination of the above greatly reduces the CPU’s

bandwidth requirement, increases performance, and reduces power consumption.

Data Rate

The M781 is capable of operation up to 20 Mbps at 3.3V with 4X internal sampling clock rate. The device can

operate at 3.3V with a 24 MHz crystal on pins XTAL1 and XTAL2, or external clock source of 80 MHz on XTAL1

pin. With a typical crystal of 14.7456 MHz and through a software option, the user can set the prescaler bit and

sampling rate for data rates of up to 3.68 Mbps.

Enhanced Features

The rich feature set of the M781 is available through the internal registers. Automatic hardware/software flow

control, programmable transmit and receive FIFO trigger levels, selectable baud rates, infrared encoder/

www.DataShdeeect4oUd.ceorm, modem interface controls, and a sleep mode are all standard features. MCR bit-5 provides a facility

for turning off (Xon) software flow control with any incoming (RX) character. The M781 includes new features

such as 9-bit (Multidrop) mode, auto RS-485 half-duplex direction control, different baud rate for TX and RX,

fast IR mode and fractional baud rate generator.

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XR16M781 Datasheet PDF - Exar Corporation

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