FDD8426H Datasheet PDF - Fairchild Semiconductor
| Part Number | FDD8426H | |
| Description | Dual P and N-Channel MOSFET | |
| Manufacturers | Fairchild Semiconductor | |
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There is a preview and FDD8426H download ( pdf file ) link at the bottom of this page. Total 11 Pages | ||
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FDD8426H
September 2009
Dual N & P-Channel PowerTrench® MOSFET
N-Channel: 40 V, 12 A, 12 mΩ P-Channel: -40 V, -10 A, 17 mΩ
Features
General Description
Q1: N-Channel
Max rDS(on) = 12 mΩ at VGS = 10 V, ID = 12 A
Max rDS(on) = 15 mΩ at VGS = 4.5 V, ID = 11 A
Q2: P-Channel
Max rDS(on) = 17 mΩ at VGS = -10 V, ID = -10 A
Max rDS(on) = 27 mΩ at VGS = -4.5 V, ID = -8.3 A
100% UIL Tested
RoHS Compliant
These dual N and P-Channel enhancement mode Power
MOSFETs are produced using Fairchild Semiconductor’s
advanced PowerTrench® process that has been especially
tailored to minimize on-state resistance and yet maintain
superior switching performance.
Applications
Inverter
H-Bridge
D1/D2
D1 D2
G2
S2
G1
S1
Dual DPAK 4L
G1 G2
S1
N-Channel
S2
P-Channel
MOSFET
www.DataSheet4U.com
Maximum
Ratings
TC =
25°C
unless
otherwise
noted
Symbol
Parameter
VDS Drain to Source Voltage
VGS Gate to Source Voltage
Drain Current - Continuous (Package Limited)
ID
- Continuous (Silicon Limited)
- Continuous
TC = 25°C
TA = 25°C
- Pulsed
PD
EAS
TJ, TSTG
Power Dissipation for Single Operation
Single Pulse Avalanche Energy
Operating and Storage Junction Temperature Range
TC = 25°C
TA = 25°C
TA = 25°C
(Note 1)
(Note 1a)
(Note 1b)
(Note 3)
Thermal Characteristics
Q1 Q2
40 -40
±20 ±20
17 -17
56 -48
12 -10
40 -40
56 65
3.1
1.3
112 162
-55 to +150
Units
V
V
A
W
mJ
°C
RθJC
RθJC
Thermal Resistance, Junction to Case, Single Operation for Q1
Thermal Resistance, Junction to Case, Single Operation for Q2
Package Marking and Ordering Information
(Note 1)
(Note 1)
1.4
1.4
°C/W
Device Marking
FDD8426H
Device
FDD8426H
Package
TO-252-4L
Reel Size
13”
Tape Width
12mm
Quantity
2500units
©2009 Fairchild Semiconductor Corporation
FDD8426H Rev.C
1
www.fairchildsemi.com
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Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
10
ID = 12 A
8
6
4
VDD = 10 V
VDD = 20 V
VDD = 30 V
2
0
0 10 20 30 40
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
5000
Ciss
1000
Coss
f = 1 MHz
VGS = 0 V
100
0.1
1
Crss
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. CapacitancevsDrain
to Source Voltage
40
20 80
10
TJ = 125 oC
TJ = 25 oC
1
0.01
TJ = 150 oC
0.1 1 10
tAV, TIME IN AVALANCHE (ms)
www.DataSheet4U.com Figure9. UnclampedInductive
Switching Capability
100
60
VGS = 10 V
40
VGS = 4.5 V
20
RθJC = 1.4 oC/W
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
150
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
100
100 us
10
THIS AREA IS
LIMITED BY rDS(on)
1 SINGLE PULSE
TJ = MAX RATED
RθJC = 1.4 oC/W
TC = 25 oC
0.1
0.1
1
1 ms
10 ms
100 ms
1s
10 100 200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
1000
SINGLE PULSE
RθJC = 1.4 oC/W
TC = 25 oC
100
50
10-4
10-3
10-2
t, PULSE WIDTH (sec)
Figure 12. Single Pulse Maximum
Power Dissipation
10-1
©2009 Fairchild Semiconductor Corporation
FDD8426H Rev.C
5
www.fairchildsemi.com
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| Information | Total 11 Pages | |
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| Part Number | Description | Manufacturers |
| FDD8426H | The function is Dual P and N-Channel MOSFET. | Fairchild Semiconductor |
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