WV3EG128M72EFSR-D3 Datasheet PDF - White Electronic Designs
| Part Number | WV3EG128M72EFSR-D3 | |
| Description | 1GB - 128Mx72 DDR SDRAM REGISTERED w/PLL | |
| Manufacturers | White Electronic Designs | |
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White Electronic Designs WV3EG128M72EFSR-D3
ADVANCED*
1GB – 128Mx72 DDR SDRAM REGISTERED w/PLL, FBGA
FEATURES
Double-data-rate architecture
DDR266 and DDR333
• JEDEC design specifications
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2,5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Power Supply:
• VCC = VCCQ = +2.5V ±0.2V (100, 133 and
166MHz)
184 pin DIMM package
PCB height:
• D3: 29.97mm (1.18")
NOTE: Consult factory for availability of:
• Lead-Free Products
• Vendor source control options
www.Da• tIandSuhsteriaeltt4emUp.ecroatmure options
DESCRIPTION
The WV3EG128M72EFSR is a 128Mx72 Double Data
Rate SDRAM memory module based on 512Mb DDR
SDRAM component. The module consists of eighteen
64Mx8 DDR components in FBGA packages mounted on
a 184 Pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lenths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
Clock Speed
CL-tRCD-tRP
OPERATING FREQUENCIES
DDR333 @CL=2.5
166MHz
2.5-3-3
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2.5
133MHz
2.5-3-3
March 2005
Rev. 0
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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White Electronic Designs WV3EG128M72EFSR-D3
ADVANCED
IDD SPECIFICATIONS AND TEST CONDITIONS
Recommended operating conditions, 0°C ≤ TA ≤ 70°C, VCCQ = 2.5V ± 0.2V, VCC = 2.5V ± 0.2V
Includes DDR SDRAM component only
Parameter
Operating Current
Symbol
IDD0
Operating Current
IDD1
Precharge Power-
Down Standby Current
Idle Standby Current
IDD2P
IDD2F
Active Power-Down
Standby Current
Active Standby Current
IDD3P
IDD3N
Operating Current
Operating Current
IDD4R
IDD4W
Auto Refresh Current
IDD5
wSwelwf R.DefaretsahSChuereretn4tU.com IDD6
Operating Current
IDD7A
Conditions
One device bank; Active - Precharge; tRC=tRC (MIN);
tCK=tCK (MIN); DQ,DM and DQS inputs changing once
per clock cycle; Address and control inputs changing
once every two cycles.
One device bank; Active-Read-Precharge Burst = 2;
tRC=tRC (MIN); tCK=tCK (MIN); lOUT = 0mA; Address and
control inputs changing once per clock cycle.
All device banks idle; Power-down mode; tCK=tCK (MIN);
CKE=(low)
CS# = High; All device banks idle; tCK=tCK (MIN); CKE
= high; Address and other control inputs changing once
per clock cycle. VIN = VREF for DQ, DQS and DM.
One device bank active; Power-Down mode; tCK (MIN);
CKE=(low)
CS# = High; CKE = High; One device bank; Active-
Precharge; tRC=tRAS (MAX); tCK=tCK (MIN); DQ, DM and
DQS inputs changing twice per clock cycle; Address
and other control inputs changing once per clock cycle.
Burst = 2; Reads; Continuous burst; One device bank
active; Address and control inputs changing once per
clock cycle; TCK= TCK (MIN); lOUT = 0mA.
Burst = 2; Writes; Continuous burst; One device bank
active; Address and control inputs changing once per
clock cycle; tCK=tCK (MIN); DQ,DM and DQS inputs
changing once per clock cycle.
tRC = tRC (MIN)
CKE ≤ 0.2V
Four bank interleaving Reads (BL=4) with auto
precharge with tRC=tRC (MIN); tCK=tCK (MIN); Address
and control inputs change only during Active Read or
Write commands.
DDR333@
CL=2.5
Max
4140
4680
180
1620
1260
1800
4770
4590
7020
180
9090
DDR266@
CL=2
Max
4140
4680
180
1620
1260
1800
4770
4590
7020
180
9000
DDR266@
CL=2.5
Max
4140
Units
mA
4680 mA
180 rnA
1620 mA
1260 mA
1800 mA
4770 mA
4590 rnA
7020 mA
180 mA
9000 mA
March 2005
Rev. 0
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for WV3EG128M72EFSR-D3 electronic component. |
| Information | Total 13 Pages | |
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Featured Datasheets
| Part Number | Description | Manufacturers |
| WV3EG128M72EFSR-D3 | The function is 1GB - 128Mx72 DDR SDRAM REGISTERED w/PLL. | White Electronic Designs |
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