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PDF ISL6262A Data sheet ( Hoja de datos )
| Número de pieza | ISL6262A | |
| Descripción | 2-Phase Core Controller | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
December 23, 2008
ISL6262A
FN6343.1
Two-Phase Core Controller
(Santa Rosa, IMVP-6+)
The ISL6262A is a two-phase buck converter regulator
implementing Intel® IMVP-6+ protocol with embedded gate
drivers. The two-phase buck converter uses two interleaved
channels to effectively double the output voltage ripple
frequency, and thereby reduce output voltage ripple
amplitude with fewer components; lower component cost;
reduced power dissipation; and smaller real estate area.
The heart of the ISL6262A is the patented R3 Technology™,
Intersil’s Robust Ripple Regulator modulator. Compared with
the traditional multiphase buck regulator, the R3
Technology™ has the fastest transient response. This is due
to the R3 modulator commanding variable switching
frequency during a load transient.
Intel® Mobile Voltage Positioning (IMVP) is a smart voltage
regulation technology, which effectively reduces power
dissipation in Intel® Pentium processors. To boost battery
life, the ISL6262A supports DPRSLPVR (deeper sleep),
DPRSTP# and PSI# functions, and maximizes the efficiency
via automatically enabling different phase operation modes.
At heavy load operation of the active mode, the regulator
commands the two phase continuous conduction mode
(CCM) operation. While the PSI# is asserted with medium
load in active mode, the ISL6262A smoothly disables one
phase and operates in one-phase CCM. When the CPU
enters deeper sleep mode, the ISL6262A enables diode
emulation to maximize the efficiency at light load.
For better system power management of the portable
computer, the ISL6262A also provides a CPU power monitor
output. The analog output at the power monitor pin can be
fed into an A/D converter to report instantaneous or average
CPU power.
A 7-bit digital-to-analog converter (DAC) allows dynamic
adjustment of the core output voltage from 0.300V to 1.500V.
A 0.5% system accuracy of the core output voltage
over-temperature is achieved by the ISL6262A.
A unity-gain differential amplifier is provided for remote CPU
die sensing. This allows the voltage on the CPU die to be
accurately measured and regulated per Intel® IMVP-6+
specifications. Current sensing can be realized using either
lossless inductor DCR sensing, or precision resistor sensing.
A single NTC thermistor network thermally compensates the
gain and the time constant of the DCR variations.
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Features
• Precision Two/One-phase CORE Voltage Regulator
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
• Internal Gate Driver with 2A Driving Capability
• Dynamic Phase Adding/Dropping
• Microprocessor Voltage Identification Input
- 7-Bit VID Input
- 0.300V to 1.500V in 12.5mV Steps
- Support VID Change On-the-Fly
• Multiple Current Sensing Schemes Supported
- Lossless Inductor DCR Current Sensing
- Precision Resistive Current Sensing
• CPU Power Monitor
• Thermal Monitor
• User Programmable Switching Frequency
• Differential Remote CPU Die Voltage Sensing
• Static and Dynamic Current Sharing
• Overvoltage, Undervoltage, and Overcurrent Protection
• Pb-Free (RoHS Compliant)
Ordering Information
PART NUMBER
PART
(Note)
MARKING
TEMP.
RANGE
(°C)
PACKAGE PKG.
(Pb-Free) DWG. #
ISL6262ACRZ ISL6262 ACRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6262ACRZ-T* ISL6262 ACRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6262AIRZ ISL6262 AIRZ -40 to +100 48 Ld 7x7 QFN L48.7x7
ISL6262AIRZ-T* ISL6262 AIRZ -40 to +100 48 Ld 7x7 QFN L48.7x7
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved. R3 Technology™ is a trademark of Intersil Americas Inc.
Intel® is a registered trademark of Intel Corporation. All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6262A
Electrical Specifications
VDD = 5V, TA = -40°C to +100°C, unless otherwise specified. Parameters with MIN and/or MAX limits are 100%
tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
PGOOD Delay
Overvoltage Threshold
Severe Overvoltage Threshold
OCSET Reference Current
OC Threshold Offset
tpgd
OVH
OVHS
CLK_EN# Low to PGOOD High
VO rising above setpoint >1ms
VO rising above setpoint >0.5µs
I (RBIAS) = 10µA
DROOP rising above OCSET >120µs
6.3 7.6 8.9 ms
160 200 240 mV
1.675
1.7
1.725
V
9.8 10 10.2 µA
-3.5 3.5 mV
Current Imbalance Threshold
Difference between ISEN1 and ISEN2 >1ms
9
mV
Undervoltage Threshold
(VDIFF-SOFT)
UVf VO falling below setpoint for >1ms
-360
-300
-240
mV
LOGIC INPUTS
VR_ON, DPRSLPVR Input Low
VR_ON, DPRSLPVR Input High
Leakage Current of VR_ON
Leakage Current of DPRSLPVR
DAC(VID0-VID6), PSI# and
DPRSTP# Input Low
VIL(3.3V)
VIH(3.3V)
IIL(3.3V)
Logic input is low
IIH(3.3V)
Logic input is high at 3.3V
IIL_DPRSLP(3.3V) DPRSLPVR input is low
IIH_DPRSLP(3.3V) DPRSLPVR input is high at 3.3V
VIL(1V)
1V
2.3 V
-1 0
µA
0 1 µA
-1 0
µA
0.45 1 µA
0.3 V
DAC(VID0-VID6), PSI# and
DPRSTP# Input High
VIH(1V)
0.7 V
Leakage Current of DAC(VID0-
VID6), PSI# and DPRSTP#
THERMAL MONITOR
IIL(1V)
IIH(1V)
Logic input is low
Logic input is high at 1V
-1 0
0.45
µA
1 µA
NTC Source Current
NTC = 1.3V
53 60 67 µA
Over-Temperature Threshold
V(NTC) falling
1.18 1.2 1.22 V
VR_TT# Low Output Resistance
POWER MONITOR
RTT I = 20mA
6.5 9 Ω
PMON Output Voltage Range
PMON Maximum Voltage
PMON Sourcing Current
PMON Sinking Current
Maximum Current Sinking Capability
Vpmon
Vpmonmax
Isc_pmon
Isk_pmon
VSEN = 1.2V, Droop - VO = 80mV
VSEN = 1V, Droop - VO = 20mV
VSEN = 1V, Droop - VO = 50mV
VSEN = 1V, Droop - VO = 50mV
(see Figure 31)
1.638
0.308
2.8
2
2
PMON/
250Ω
1.680
0.350
3.0
PMON/
180Ω
1.722
0.392
PMON/
130Ω
V
V
V
mA
mA
A
PMON Impedance
When PMON is within its sourcing/sinking
current range (Established by
characterization)
7Ω
CLK_EN# OUTPUT LEVELS
CLK_EN# High Output Voltage
CLK_EN# Low Output Voltage
VOH
VOL
3V3 = 3.3V, I = -4mA
ICLK_EN# = 4mA
2.9 3.1
V
0.26 0.4 V
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5 FN6343.1
December 23, 2008
5 Page 
ISL6262A
Typical Performance Curves 0.36µH Filter Inductor and 4 x 330µF Output SP Caps and 24 x 22µF Ceramic Caps (Continued)
VOUT
LOAD TRANSIENT
VID3
VOUT
PHASE1,
PHASE2
DYNAMIC VID
ACTIVE MODE
FIGURE 14. LOAD STEP-UP RESPONSE AT THE CPU
SOCKET MPGA479, 35A LOAD STEP @ 200A/µs,
2 PHASE CCM
FIGURE 15. VID3 CHANGE OF 010X000 FROM 1V TO 1.1V
WITH DPRSLPVR = 0, DPRSTP# = 1, PSI# = 1
VOUT
LOAD TRANSIENT
FIGURE 16. LOAD DUMP RESPONSE AT THE CPU SOCKET
MPGA479, 35A LOAD STEP @ 200A/µs, 2 PHASE
CCM
VOUT
VID3
PHASE1,
PHASE2
DYNAMIC VID
ACTIVE MODE
FIGURE 17. VID3 CHANGE OF 010X000 FROM 1.1V TO 1V
WITH DPRSLPVR = 0, DPRSTP# = 1, PSI# = 1
PSI#
DROP PHASE IN
ACTIVE MODE
VCORE
PHASE1
PSI#
VCORE
ADD PHASE IN
ACTIVE MODE
PHASE1
PHASE2
FIGURE 18. 2-CCM TO 1-CCM UPON PSI# ASSERTION WITH
www.DataSheet4U.cVoImD LSB CHANGE, AT DPRSLPVR = 0,
DPRSTP# = 1, ILOAD = 10A
11
PHASE2
FIGURE 19. 1-CCM TO 2-CCM UPON PSI# DEASSERTION
WITH VID LSB CHANGE AT DPRSLPVR = 0,
DPRSTP# = 1
FN6343.1
December 23, 2008
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet ISL6262A.PDF ] | |
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