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PDF MAX2077 Data sheet ( Hoja de datos )

Número de pieza MAX2077
Descripción Octal-Channel Ultrasound Front-End
Fabricantes Maxim Integrated Products 
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19-4696; Rev 0; 7/09
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Octal-Channel Ultrasound Front-End
General Description
The MAX2077 octal-channel ultrasound front-end is a
fully integrated, bipolar, high-density, octal-channel
ultrasound receiver optimized for low-cost, high-chan-
nel count, high-performance portable and cart-based
ultrasound systems. The easy-to-use IC allows the user
to achieve high-end 2D and PW imaging capability
using substantially less space and power. The highly
compact imaging receiver lineup, including a low-noise
amplifier (LNA), variable-gain amplifier (VGA), and anti-
alias filter (AAF), achieves an ultra-low 2.4dB noise fig-
ure at RS = RIN = 200at a very low 64.8mW per-
channel power dissipation. The full imaging receiver
channel has been optimized for second-harmonic
imaging with -64dBFS second-harmonic distortion per-
formance with a 1VP-P 5MHz output signal and broad-
band SNR of > 68dB* at 20dB gain. The bipolar
front-end has also been optimized for excellent low-
velocity PW and color-flow Doppler sensitivity with an
exceptional near-carrier SNR of 140dBc/Hz at 1kHz off-
set from a 5MHz 1VP-P output clutter signal.
The MAX2077 octal-channel ultrasound front-end is
available in a small 8mm x 8mm, 56-pin thin QFN or
10mm x 10mm, 68-pin thin QFN package with an
exposed pad and is specified over a 0°C to +70°C tem-
perature range. To add CW Doppler capability, replace
the MAX2077 with the MAX2078.
Applications
Medical Ultrasound Imaging
Sonar
Pin Configurations and Typical Application Circuits appear
at end of data sheet.
Features
o 8 Full Channels of LNA, VGA, and AAF in a Small,
8mm x 8mm, 56-Pin or 10mm x 10mm, 68-Pin
TQFN Package
o Ultra-Low Full-Channel Noise Figure of 2.4dB at
RIN = RS = 200
o Low Output-Referred Noise of 23nV/Hz at 5MHz,
20dB Gain, Yielding a Broadband SNR of 68dB*
for Excellent Second-Harmonic Imaging
o High Near-Carrier SNR of 140dBc/Hz at 1kHz
Offset from a 5MHz, 1VP-P Output Signal, and
20dB of Gain for Excellent Low-Velocity PW and
Color-Flow Doppler Sensitivity in a High-Clutter
Environment
o Ultra-Low Power 64.8mW per Full-Channel (LNA,
VGA, and AAF) Normal Imaging Mode
o Selectable Active Input-Impedance Matching of
50, 100, 200, and 1k
o Wide Input-Voltage Range of 330mVP-P in High LNA
Gain Mode and 550mVP-P in Low LNA Gain Mode
o Integrated Selectable 3-Pole 9MHz, 10MHz,
15MHz, and 18MHz Butterworth AAF
o Fast-Recovery, Low-Power Modes (< 2µs)
o Pin Compatible with the MAX2078 Ultrasound
Front-End with CW Doppler (MAX2077 68-Pin
Package Variant)
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX2077CTN+
0°C to +70°C 56 Thin QFN-EP**
MAX2077CTK+
0°C to +70°C 68 Thin QFN-EP**
+Denotes a lead(Pb)-free/RoHS-compliant package.
**EP = Exposed pad.
Future product—contact factory for availability.
*When coupled with the MAX1437B ADC.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

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MAX2077 pdf
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Octal-Channel Ultrasound Front-End
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0°C to +70°C, VGND = 0V,
NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200Ω, LNA gain = 18.5dB), D5/D4=1/1(fC = 18MHz), fRF = 5MHz, RS = 200Ω, capaci-
tance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1kΩ differen-
tial, reference noise less than 10nV/Hz from 1kHz to 20MHz, DOUT loaded with 10MΩ and 60pF. Typical values are at VCC1 = 3.3V,
VCC2 = 4.75V, TA = +25°C, unless otherwise noted.) (Note 5)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
3V Supply Modulation Ratio
Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P,
fRF = 5MHz, fMOD = 1kHz, VMOD = 50mVP-P, ratio of
output sideband at 5.001MHz, 1VP-P
-73 dBc
4.75V/5V Supply Modulation
Ratio
Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P,
fRF = 5MHz, fMOD = 1kHz, VMOD = 50mVP-P, ratio of
output sideband at 5.001MHz, 1VP-P
-82 dBc
Gain Control Lines Common-
Mode Rejection Ratio
Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P,
fRF = 5MHz, fMOD(CM) = 1kHz, VMOD(CM) = 50mVP-P,
ratio of output sideband at 5.001MHz to 1VP-P
-74 dBc
Overdrive Phase Delay
Output Impedance
VG+ - VG- = -3V, delay between VIN = 300mVP-P and
VIN = 30mVP-P differential
Differential
5 ns
100 
AC ELECTRICAL CHARACTERISTICS—SERIAL PERIPHERAL INTERFACE
(DOUT loaded with 60pF and 10MΩ, 2ns rise and fall edges on CLK.)
PARAMETER
Clock Speed
Mininimum Data-to-Clock Setup
Time
SYMBOL
tCS
CONDITIONS
MIN TYP MAX UNITS
10 MHz
5 ns
Mininimum Data-to-Clock Hold
Time
Mininimum Clock-to-CS Setup
Time
tCH
tES
0 ns
5 ns
CS Positive Mininimum Pulse
Width
tEW
1 ns
Mininimum Clock Pulse Width
tCW
2 ns
Note 5:
Note 6:
Note 7:
Note 8:
Minimum and maximum limits at TA = +25°C and +70°C are guaranteed by design, characterization, and/or production test.
Noise performance of the device is dependent on the noise contribution from VREF. Use a low-noise supply for VREF. The
reference input noise is given for 8 channels, knowing that the reference-noise contributions are correlated in all 8 chan-
nels. If more channels are used, the reference noise must be reduced to get the best noise performance.
Not applicable to the MAX2077CTK.
See the Ultrasound-Specific IMD3 Specification section.
_______________________________________________________________________________________ 5

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Octal-Channel Ultrasound Front-End
Pin Description (continued)
PIN
56 TQFN 68 TQFN
27 34
28 35
29 36
30 37
31 38
32 39
33 40
34 41
36 45
37 46
38 47
39 48
40 49
41 50
42 51
43 52
44 54
45 55
46 56
47 —
48 57
50 9, 28, 31
52 65
53 66
54 67
55 68
56 1
29, 30,
33, 42,
43, 53,
58–62
——
NAME
FUNCTION
OUT8-
OUT8+
OUT7-
OUT7+
OUT6-
OUT6+
OUT5-
OUT5+
OUT4-
OUT4+
OUT3-
OUT3+
OUT2-
OUT2+
OUT1-
OUT1+
CLK
DIN
CS
PD
NP
GND
ZF1
IN1
INC1
ZF2
IN2
Channel 8 Negative Differential Output
Channel 8 Positive Differential Output
Channel 7 Negative Differential Output
Channel 7 Positive Differential Output
Channel 6 Negative Differential Output
Channel 6 Positive Differential Output
Channel 5 Negative Differential Output
Channel 5 Positive Differential Output
Channel 4 Negative Differential Output
Channel 4 Positive Differential Output
Channel 3 Negative Differential Output
Channel 3 Positive Differential Output
Channel 2 Negative Differential Output
Channel 2 Positive Differential Output
Channel 1 Negative Differential Output
Channel 1 Positive Differential Output
Serial Port Data Clock (Positive Edge Triggered). 3.3V CMOS. Clock input for programming
the serial shift registers.
Serial Port Data Input Line. 3.3V CMOS. Data input to program the serial shift registers.
Active-Low Serial Port Chip Select. 3.3V CMOS. Used to store programming bits in registers,
as well as in CW mode, synchronizing all channel phases (on a rising edge).
Power-Down Mode Select Input (56-Pin TQFN Only). Drive PD high to place the entire device
in power-down mode. Drive PD low for normal operation. This mode overrides the standby
mode.
VGA Standby Mode Select Input. Set NP to 1 to place the entire device in standby mode.
Overrides soft channel shutdown in serial shift register, but not general power-down (PD).
Ground
Channel 1 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor.
Channel 1 Positive Differential Input
Channel 1 Clamp Input. Connect to a coupling capacitor.
Channel 2 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor.
Channel 2 Positive Differential Input
N.C. No Connection. Internally not connected.
Exposed pad. Internally connected to ground. Connect to a large ground plane using
EP multiple vias to maximize thermal and electrical performance. Not intended as an electrical
connection point.
______________________________________________________________________________________ 11

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