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PDF L5986 Data sheet ( Hoja de datos )
| Número de pieza | L5986 | |
| Descripción | 2.5A step-down switching regulator | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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L5986
2.5 A step-down switching regulator
Preliminary Data
Features
■ 2.5 A DC output current
■ 2.9 V to 18 V input voltage
■ Output voltage adjustable from 0.6 V
■ 250 kHz switching frequency, programmable
up to 1 MHz
■ Internal soft-start and inhibit
■ Low dropout operation: 100 % duty cycle
■ Voltage feed-forward
■ Zero load current operation
■ Over current and thermal protection
■ VFQFPN3x3-8L and HSOP8 package
Application
Consumer:
STB, DVD, DVD recorder, car audio, LCD TV
and monitors
Industrial:
PLD, PLA, FPGA, chargers
Networking: XDSL, modems, DC-DC modules
Computer:
Optical storage, hard disk drive, printers,
audio/graphic cards
LED driving
VFQFPN8 3x3 mm HSOP8 exposed pad
Description
The L5986 is a step down switching regulator with
3.0 A (minimum) current limited embedded power
MOSFET, so it is able to deliver up to 2.5 A
current to the load depending on the application
conditions.
The input voltage can range from 2.9 V to 18 V,
while the output voltage can be set starting from
0.6 V to VIN. Having a minimum input voltage of
2.9 V, the device is suitable also for 3.3 V bus.
Requiring a minimum set of external components,
the device includes an internal 250 kHz switching
frequency oscillator that can be externally
adjusted up to 1 MHz.
The QFN and the HSOP packages with exposed
pad allow reducing the RthJA down to 60 °C/W
and 40 °C/W respectively.
Figure 1. Application circuit
August 2008
Rev 1
This is preliminary information on a new product now in development or undergoing evaluation.
Details are subject to change without notice.
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4 Electrical characteristics
Electrical characteristics
TJ = 25 °C, VCC = 12 V, unless otherwise specified.
Table 4. Electrical characteristics
Symbol
Parameter
Test condition
VCC
VCCON
VCCOFF
Operating input voltage
range
Turn on VCC threshold
Turn off VCC threshold
(1)
(1)
(1)
RDS(on) Mosfet on resistance
(1)
ILIM Maximum limiting current
Oscillator
FSW Switching frequency
(1)
VFSW
D
FADJ
FSW pin voltage
Duty cycle
Adjustable switching
frequency
RFSW = 33 kΩ
Dynamic characteristics
VFB Feedback voltage
DC characteristics
2.9 V < VCC < 18 V (1)
IQ
IQST-BY
Quiescent current
Total stand-by quiescent
current
Duty cycle = 0,
VFB = 0.8 V
Inhibit
INH threshold voltage
INH current
Device ON level
Device OFF level
INH = 0
Soft-start
TSS Soft-start duration
FSW pin floating
FSW = 1 MHz,
RFSW = 33 kΩ
Values
Min Typ Max
Unit
2.9 18
2.9 V
2.4
140 170
mΩ
140 220
3.0 3.5 3.9
A
225 250 275
220 275
1.262
0 100
1000
kHz
V
%
kHz
0.593 0.6 0.607 V
2.4 mA
20 30 μA
0.6
V
1.9
7.5 10 μA
7.4 8.2 9.1
ms
2
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Functional description
5.3 Error amplifier and compensation
The error amplifier (E/A) provides the error signal to be compared with the sawtooth to
perform the pulse width modulation. Its non-inverting input is internally connected to a 0.6 V
voltage reference, while its inverting input (FB) and output (COMP) are externally available
for feedback and frequency compensation. In this device the error amplifier is a voltage
mode operational amplifier so with high DC gain and low output impedance.
The uncompensated error amplifier characteristics are the following:
Table 5. Uncompensated error amplifier characteristics
Parameter
Value
Low frequency gain
100 dB
GBWP
Slew rate
Output voltage swing
4.5 MHz
7 V/μs
0 to 3.3 V
Maximum source/sink current
25 mA/40 mA
In continuous conduction mode (CCM), the transfer function of the power section has two
poles due to the LC filter and one zero due to the ESR of the output capacitor. Different
kinds of compensation networks can be used depending on the ESR value of the output
capacitor. In case the zero introduced by the output capacitor helps to compensate the
double pole of the LC filter a type II compensation network can be used. Otherwise, a type
III compensation network has to be used (see Chapter 6.4 for details about the
compensation network selection).
Anyway the methodology to compensate the loop is to introduce zeros to obtain a safe
phase margin.
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet L5986.PDF ] | |
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