|
|
PDF XR21V1412 Data sheet ( Hoja de datos )
| Número de pieza | XR21V1412 | |
| Descripción | 2-Ch Full-Speed USB UART | |
| Fabricantes | Exar Corporation | |
| Logotipo |  |
|
1. XR21V1412  Hay una vista previa y un enlace de descarga de XR21V1412 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
XR21V1412
2-CH FULL-SPEED USB UART
DECEMBER 2013
REV. 1.3.0
GENERAL DESCRIPTION
The XR21V1412 (V1412) is an enhanced 2-channel
Universal Asynchronous Receiver and Transmitter
(UART) with a USB interface. The USB interface is
fully compliant to Full Speed USB 2.0 specification
that supports 12 Mbps USB data transfer rate. The
USB interface also supports USB suspend, resume
and remote wakeup operations.
The V1412 operates from an internal 48MHz clock
therefore no external crystal/oscillator is required as
in previous generation UARTs. With the fractional
baud rate generator, any baud rate can accurately be
generated using the internal 48MHz clock.
The large 128-byte TX FIFO and 384-byte RX FIFO
of the V1412 helps to optimize the overall data
throughput for various applications. If required, the
multidrop mode and automatic RS-485 half-duplex
direction control feature further simplifies typical
multidrop RS-485 applications.
The V1412 operates from a single 2.97 to 3.63 volt
power supply and has 5V tolerant inputs. The V1412
is available in a 32-pin QFN package.
WHQL certified software drivers for Windows 2000,
XP, Vista, 7, 8, and CE, as well as Linux and Mac are
supported for the XR21V1412.
APPLICATIONS
• Portable Appliances
• External Converters (dongles)
• Battery-Operated Devices
• Cellular Data Devices
• Factory Automation and Process Controls
• Industrial applications
FEATURES
• USB 2.0 Compliant, Full-Speed (12 Mbps)
■ Supports USB suspend, resume and remote
wakeup operations
■ ± 5 kV HBM ESD protection on USB data pins
■ ± 2 kV HBM ESD protection on all other pins
• Enhanced Features of each UART
■ UART data rates up to 12 Mbps
■ Fractional Baud Rate Generator
■ 128 byte TX FIFO
■ 384 byte RX FIFO
■ 7, 8 or 9 data bits
■ 1 or 2 stop bits
■ Odd, even, mark, space or no parity
■ Automatic Hardware (RTS/CTS or DTR/DSR)
Flow Control
■ Automatic Software (Xon/Xoff) Flow Control
■ Multidrop mode
■ Auto RS-485 Half-Duplex Control
■ Half-Duplex mode
■ Selectable GPIO or Modem I/O
• Internal 48 MHz clock
• Single 3.3V power supply
• 5V tolerant GPIO inputs
• 32-pin QFN package
• Virtual COM Port WHQL certified drivers
■ Windows 2000, XP, Vista, Win7 and Win8
■ Windows CE 4.2, 5.0, 6.0, 7.0
■ Linux
■ Mac
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
1 page  
REV. 1.3.0
XR21V1412
2-CH FULL-SPEED USB UART
NAME
32-QFN
PIN #
TYPE
DESCRIPTION
GPIOB1/CDB# 21 I/O UART Channel B general purpose I/O or UART Carrier-Detect input (active low).
This pin has an internal pull-up resistor which is disabled during suspend mode. If
using this GPIO as an input, an external pull-up resistor is required to minimize the
power consumption in the suspend mode.
GPIOB2/DSRB# 20
I/O UART Channel B general purpose I/O or UART Data-Set-Ready input (active low).
See ”Section 1.5.6, Automatic DTR/DSR Hardware Flow Control” on
page 11. This pin has an internal pull-up resistor which is disabled during suspend
mode. If using this GPIO as an input, an external pull-up resistor is required to mini-
mize the power consumption in the suspend mode.
GPIOB3/DTRB# 19
I/O UART Channel B general purpose I/O or UART Data-Terminal-Ready output (active
low). See ”Section 1.5.6, Automatic DTR/DSR Hardware Flow Control”
on page 11. This pin has an internal pull-up resistor which is disabled during sus-
pend mode. If using this GPIO as an input, an external pull-up resistor is required to
minimize the power consumption in the suspend mode.
GPIOB4/CTSB# 18
I/O UART Channel B general purpose I/O or UART Clear-to-Send input (active low).
See ”Section 1.5.5, Automatic RTS/CTS Hardware Flow Control” on
page 11. This pin has an internal pull-up resistor which is disabled during suspend
mode. If using this GPIO as an input, an external pull-up resistor is required to mini-
mize the power consumption in the suspend mode.
GPIOB5/RTSB#/
RS485B
17
I/O UART Channel B general purpose I/O or UART Request-to-Send output (active low)
or auto RS-485 half-duplex control. See “Section 1.5.5, Automatic RTS/CTS
Hardware Flow Control” on page 11 or “Section 1.5.8, Auto RS-485 Half-
Duplex Control” on page 12. This pin has an internal pull-up resistor which is
disabled during suspend mode. If using this GPIO as an input, an external pull-up
resistor is required to minimize the power consumption in the suspend mode.
USB Interface Signals
USBD+
30
USBD-
29
I2C Interface Signals
SDA
25
I/O USB port differential data plus. This pin has a 1.5 K Ohm internal pull-up resistor.
I/O USB port differential data minus.
I/O I2C-controller data input/output (open-drain). An optional external I2C EEPROM can
OD be used to store default configurations upon power-up including the USB Vendor ID
and Device ID. See Table 3. A pull-up resisitor (typically 4.7 to 10k Ohms) is
required.
If an EEPROM is not used, this pin can be used with the SCL pin to select the
Remote Wake-up and Power modes. An external pull-up or pull-down resistor is
required. See Table 2.
SCL 26 I/O I2C-controller serial input clock. An optional external I2C EEPROM can be used to
OD store default configurations upon power-up including the USB Vendor ID and Device
ID. See Table 3. A pull-up resisitor (typically 4.7 to 10k Ohms) is required.
If an EEPROM is not used, this pin can be used with the SDA pin to select the
Remote Wake-up and Power modes. An external pull-up or pull-down resistor is
required. See Table 2.
5
5 Page 
XR21V1412
REV. 1.3.0
2-CH FULL-SPEED USB UART
RX_FIFO_LOW_LATENCY register bit to force the V1412 to be in the low latency mode, or the user may
manually set this bit. With the CDC-ACM driver, the low latency mode is automatically set whenever the baud
rate is set to a value of less than 46921 bps using the CDC_ACM_IF_SET_LINE_CODING command.
1.5.4 GPIO
Each UART has 6 GPIOs. By hardware default the GPIOs are configured as inputs but may be modified by a
custom driver. Additionally, there are several modes that can be enabled to add additional feature such as
auto RTS/CTS flow control, auto DTR/DSR flow control or auto RS-485 half duplex control. See Table 14.
1.5.5 Automatic RTS/CTS Hardware Flow Control
GPIO5 and GPIO4 of the UART channel can be enabled as the RTS# and CTS# signals for Auto RTS/CTS
flow control when GPIO_MODE[2:0] = ’001’ and FLOW_CONTROL[2:0] = ’001’. Automatic RTS flow control is
used to prevent data overrun errors in local RX FIFO by de-asserting the RTS signal to the remote UART.
When there is room in the RX FIFO, the RTS pin will be re-asserted. Automatic CTS flow control is used to
prevent data overrun to the remote RX FIFO. The CTS# input is monitored to suspend/restart the local
transmitter (see Figure 5):
FIGURE 5. AUTO RTS AND CTS FLOW CONTROL OPERATION
RTSA#
CTSB#
TXB
RXA
Local UART
UARTA
R e c e iv e r F IF O
T rig g e r R e a c h e d
A u to R T S
T rig g e r L e v e l
T ra n s m itte r
A u to C T S
M o n ito r
RXA
RTSA#
TXA
CTSA#
1
2
3
4
ON
ON
6
7
8
5
O FF
OFF
TXB
CTSB#
RXB
RTSB#
9
10
11
R e m o te U A R T
UARTB
T ra n s m itte r
A u to C T S
M o n ito r
R e c e iv e r F IF O
T rig g e r R e a c h e d
A u to R T S
T rig g e r L e v e l
ON
ON
1 ) C O M p o rt o p e n e d , R X F IF O e m p ty , R T S A # o u tp u t is a s s e rte d
2 ) S ig n a l p ro p a g a te d to C T S B # in p u t
3 ) D a ta b y te s e n te r T X F IF O , b e g in tra n s m ittin g o n T X B
4 ) D a ta p ro p a g a te s to R e c e iv in g d e v ic e R X A
5 ) R X F IF O re a c h e s th re s h o ld
6 ) R T S A # d e -a s s e rts
7 ) S ig n a l p ro p a g a te s to C T S B # in p u t
8 ) T ra n s m is s io n s to p s o n T X B
9 ) U S B B u lk -In e m p tie s R X F IF O b e lo w th re s h o ld , R T S A # is a s s e rte d
1 0 ) S ig n a l p ro p a g a te d to C T S B # in p u t
1 1 ) D a ta b y te s re s u m e tra n s m ittin g o n T X B
1.5.6 Automatic DTR/DSR Hardware Flow Control
Auto DTR/DSR hardware flow control behaves the same as the Auto RTS/CTS hardware flow control
described above except that it uses the DTR# and DSR# signals. For Auto hardware flow control,
FLOW_CONTROL[2:0] = ’001’. GPIO3 and GPIO2 become DTR# and DSR#, respectively, when
GPIO_MODE[2:0] = ’010’.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet XR21V1412.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| XR21V1410 | 1-Ch Full-Speed USB UART | Exar Corporation |
| XR21V1412 | 2-Ch Full-Speed USB UART | Exar Corporation |
| XR21V1414 | 4-Ch Full-Speed USB UART | Exar Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |