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PDF EDGE7725 Data sheet ( Hoja de datos )

Número de pieza EDGE7725
Descripción 900 MHz Dual Pin Electronics Driver
Fabricantes Semtech Corporation 
Logotipo Semtech Corporation Logotipo



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TEST AND MEASUREMENT PRODUCTS
Description
Edge7725
900 MHz Dual Pin Electronics Driver,
Window Comparator, and Load
Features
The Edge7725 dual channel, monolithic ATE pin electron-
ics solution is manufactured in a high-performance comple-
mentary bipolar process.
The Edge7725 operates greater than 900 MHz/1.8 Gbps.
The power supplies to the Edge7725 are specified over a
wide range to accommodate between –2V, +7V and –0.5V,
+4.2V input, output voltages.
The three-statable Edge7725 tri-level driver is capable of
generating 8V swings over a –2 to +7V range, with a mini-
mum swing of 100 mV. The driver’s third level is used when
the driver acts as a switched termination, and the load is
not being used. The differential driver mode permits the
inverse of DHI driving of Channel 0 to be output on Chan-
nel 1, creating differential outputs having a minimum of
skew. An input power down mode lowers the DOUT leak-
age current.
The Edge7725 window comparator can span a 9V com-
mon mode range. Programmable voltage clamps at the
input to the comparator provide a means to clamp voltage
overshoots and excessive ringing for unterminated com-
parator input signals. An input power down mode lowers
the VINP input leakage currents.
The Edge7725 differential comparator can compare input
differences of up to 800mV to input levels which are sepa-
rate from those of the window comparators.
The Edge7725 load supports programmable source and
sink currents of ±32 mA over a –2V to +7V range, or it can
be completely disabled. The load may be configured as a
“split load” whereby the load can act as a voltage clamp
as an alternate to the comparator’s clamp. For operating
modes requiring no load, the Edge7725’s load may be
depowered to conserve power.
• Fully Integrated Three-Statable, Tri-Level Driver,
Window Comparator, and Dynamic Active Load
• Wide Choice of Range, Performance vs. Power
• Differential Driver and Comparator Modes
• Programmable Driver Rise, Fall Times
• Programmable Voltage Clamps on Comparator Input
• –2V, +7V Driver, Compare, Load Range
• ±32 mA Programmable Load
• Comparator Input Tracking to >3V/ns
• Small, 128-Pin MQFP Package
Applications
• Logic Testers
• Mixed-Signal Test Equipment
• Memory Testers
• Flash Memory Testers
• ASIC Verifiers
Functional Block Diagram
VCM_IN
VCM_OUT
SNK
LEN
DEN
QA
QB
DHI
SEL_DHI
DHI
QB
QA
DEN
LEN
SNK
VCM_OUT
VCM_IN
ANODE
Channel 0
LE
SEL
DT
DH
SEL
SEL
SEL
DH
DT
SEL
LE
Channel 1
VCC
VEE
VEE
VCC
LOUT
RADJ
DOUT
FADJ
CVA
VCH
VINP
VCL
CVB
CVC[0]
CVC[1]
CVB
VCL
VINP
VCH
CVA
RADJ
DOUT
FADJ
LOUT
CATHODE
Revision 9 / August 22, 2006
1

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EDGE7725 pdf
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TEST AND MEASUREMENT PRODUCTS
Circuit Description
Edge7725
Introduction
Figure 1 shows a detailed block diagram of the Edge7725.
Table 1 shows the modes of the Edge7725 as configured
by the TTL inputs, CONFA and CONFB. These “configura-
tion” inputs will put the channel’s driver, comparator, and
load circuits into specific operating modes and power down
states.
this and keep the skew among the three inputs to a mini-
mum to minimize any unwanted conditions at the driver
and load outputs. It is also recommended that the driver
and load outputs be disabled when changing modes.
NOTE: Do not leave the CONF inputs floating. They should
be forced to valid high or low logic levels at all times.
The configuration inputs are asynchronous and, therefore,
when they are switching from one state to another, there
could be decoding glitches. The user should be aware of
All Off
Drive/
Receive
Pin
Drive/
Receive
Pin with
DVT
Drive Pin
Mode
Conf Mode
Internally
Inputs Powered Down
Driver, Load
Control
Function States
BA
DHI DEN LEN DOUT LOAD COMP CLAMPS Comments
0
0
0
Driver, Load,
Comp, Clamp
X
X
X Off Off Off
Off
Powered Down,
Low Leakage Mode
0 1 0 DVL
1 01
None
1 1 0 DVH Off
X 0 0 HiZ
0 1 1 DVL
Driver, Comparator, and
On
On
Load Enabled
(no Driver Tri-Level)
(Clamps On)
1 1 1 DVH On
X 0 1 HiZ
2 10
Load
0 1 0 DVL
1
X
1
1
0 DVH
Off
1 DVT
On
Driver, Comparator
Off
Enabled.
Driver Tri-Level
Clamps Off (No Load)
X 0 X HiZ
0 1 X DVL
Driver Enabled,
3
1
1
Load, Comp,
Clamp
1
1 X DVH Off Off
Off
(No Load, Comparator, or
Driver Tri-Level).
X 0 X HiZ
(Clamps Off)
KEY:
– X (Don’t Care)
– DVH (Drive High)
– DVL (Drive Low)
– DVT (Drive third, termination level)
– HiZ (High Impedance)
NOTE: The entire table above is valid for SEL_CMP and
SEL_DHI in any high or low state.
©2006 Semtech Corp. , Rev. 9, 8/22/06
Table 1: Edge7725 Modes of Operation
5
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EDGE7725 arduino
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TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
Edge7725
Comparator Power Down Modes
Load
Referring to Table 1, the comparators can be placed in a
power down mode in certain configurations. Other con-
figurations have the comparators powered and ready for
operation.
The load is configurable as a split or non-split load:
When the comparator sections are put into one of the power
down modes, the QA, QA*, QB, QB* outputs are placed in
a fixed differential logic state. The state could be a logic
“0” or “1” depending upon internal levels at the time the
circuit enters the power down mode. The outputs will not
respond to changes at the VINP pins when in power down
modes.
Minimum leakage occurs when CVA, CVB > VINP.
VCM_CAP_A
VCM_IN_A
VCM_OUT_A
External
Buffer
SNK
(b)
(a)
A
Link (a): Non-Split Load
Link (b): Split Load
LOUT
The load is capable of sourcing and sinking at least 32 mA
dynamically, or being placed into a high impedance state.
Load Enable
LEN/LEN* are “Flex In” – wide voltage differential inputs
capable of receiving ECL, TTL, CMOS, or custom levels.
Single-ended operation is supported by connecting the in-
verting input to the appropriate DC threshold level.
When the load is powered on (Table 1), the load enable
differential inputs determine whether the load is active or
in high impedance. If LEN is more positive than LEN*, the
load is active and is capable of sourcing and sinking cur-
rents. If LEN is more negative than LEN*, the load is placed
into a high impedance state (disabled).
Do NOT leave LEN / LEN* floating.
©2006 Semtech Corp. , Rev. 9, 8/22/06
11
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