PDF AK4526A Data sheet ( Hoja de datos )

Número de pieza	AK4526A
Descripción	High Performance Multi Channel Audio CODEC
Fabricantes	AKM
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No Preview Available ! ASAHI KASEI [AK4526A] www.DataSheet4U.com AK4526A High Performance Multi-channel Audio CODEC GENERAL DESCRIPTION The AK4526A is a single chip CODEC that includes two channels of ADC and six channels of DAC. The ADC outputs 20bit data and the DAC accepts up to 24bit input data. The ADC has an enhanced dual bit architecture with wide dynamic range. The DAC achieves low outband noise and high jitter tolerance by use of SCF(switched capacitor filter) techniques. An auxiliary digital audio input interface maybe used instead of the ADC for passing audio data to the primary audio output port. Control may be set directly by pins or programmed through a separate serial interface. The AK4526A has a dynamic range of 100dB and is well suited for digital surround for home theater and car audio. An AC-3 system can be built with a IEC958(SPDIF) receiver such as the AK4110. The AK4526A is available in a small 44pin LQFP package which will reduce system space. *AC-3 is a trademark of Dolby Laboratories. FEATURES • 2ch ADC with 20bit data output capability - 64x Oversampling - Sampling Rate up to 48kHz - Differential Inputs with single-ended use capability - S/(N+D): 92dB - Dynamic Range, S/N: 100dB - Digital HPF for offset cancellation - I/F format: MSB justified or I2S • 6ch DAC with 24bit data input capability - 128x Oversampling - Sampling Rate up to 96kHz - Single-Ended Outputs - 2nd order SCF - S/(N+D): 90dB - Dynamic Range: 100dB - S/N: 100dB, 108dB(Mute) - I/F format: MSB justified, LSB justified or I2S - Individual attenuation control with 21 levels and 1dB step • De-emphasis for 32kHz, 44.1kHz, 48kHz and 96kHz • High Jitter Tolerance • TTL Level Digital I/F • Serial uP I/F for mode setting • Master clock: 256fs, 384fs or 512fs for fs=32kHz to 48kHz 128fs, 192fs or 256fs for fs=96kHz • Power Supply: 4.5 to 5.5V • Small 44pin LQFP M0037-E-02 -1- 1999/6 1 page ASAHI KASEI [AK4526A] No. Pin Name www.Da3t3aSheVeRt4EUF.cLom 34 VCOM 35 VREFH 36 AVDD 37 AVSS 38 XTI 39 XTO MCKI 40 P/ S 41 DIF0 CS 42 DIF1 CCLK 43 LOOP0 CDTI 44 LOOP1 CDTO I/O Function I Negative Voltage Reference Input Pin, AVSS O Common Voltage Output Pin, AVDD/2 Large external capacitor is used to reduce power-supply noise. I Positive Voltage Reference Input Pin, AVDD - Analog Power Supply Pin - Analog Ground Pin I X’tal Input Pin O X’tal Output Pin if XTS=”H” I External Master Clock Input Pin if XTS=”L” Parallel/Serial Select Pin I “L”: Serial control mode, “H”: Parallel control mode I Audio Data Interface Format Pin in parallel mode I Chip Select Pin in serial mode I Audio Data Interface Format Pin in parallel mode I Control Data Clock Pin in serial mode I Loopback Mode Pin in parallel mode Enables digital loop-back from ADC to 3 DACs. I Control Data Input Pin in serial mode I Loopback Mode Pin in parallel mode Enables all 3 DAC channels to be input from SDTI1. O Control Data Output Pin in serial mode If pins XTS, ICKS0, ICKS1, PD , P/ S , DFS, DEM0, DEM1, CAD0, CAD1, M/ S , OCKS, SDOS are not driven, then XTS, ICKS0,ICKS1, CAD0, CAD1 must be tied to either AVSS or AVDD. PD , P/ S , DFS, DEM0, DEM1, M/ S , OCKS, SDOS must be tied to either DVSS or DVDD. M0037-E-02 -5- 1999/6 5 Page ASAHI KASEI [AK4526A] www.DataSheet4U.com LRCK BICK SDTO SDTI tBLR tLRB tLRS tSDS tSDH Audio Interface Timing (Slave mode) VIH2 VIL2 tBSD VIH2 VIL2 VIH2 VIL2 VIH2 VIL2 LRCK BICK tMBLR SDTO SDTI tSDS tSDH Audio Interface Timing (Master mode) VIH2 VIL2 tBSD VIH2 VIL2 VIH2 VIL2 VIH2 VIL2 CS CCLK CDTI CDTO tCSS tCCKL tCCKH tCDS tCDH C1 C0 R/W A4 Hi-Z WRITE/READ Command Input Timing VIH2 VIL2 VIH2 VIL2 VIH2 VIL2 M0037-E-02 - 11 - 1999/6 11 Page

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