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PDF ISL12022M Data sheet ( Hoja de datos )

Número de pieza ISL12022M
Descripción Real Time Clock
Fabricantes Intersil Corporation 
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ISL12022M
Real Time Clock with Embedded Crystal, ±5ppm Accuracy
Data Sheet
December 18, 2008
FN6668.4
Low Power RTC with Battery Backed
SRAM, Integrated ±5ppm Temperature
Compensation, and Auto Daylight Saving
The ISL12022M device is a low power real time clock (RTC)
with an embedded temperature sensor and crystal. Device
functions include oscillator compensation, clock/calendar,
power fail and low battery monitors, brownout indicator,
one-time, periodic or polled alarms, intelligent battery
backup switching, Battery Reseal™ function and 128 bytes
of battery-backed user SRAM. The device is offered in a
20 Ld SOIC module that contains the RTC and an
embedded 32.768kHz quartz crystal. The calibrated
oscillator provides less than ±5ppm drift over the full -40°C to
+85°C temperature range.
The RTC tracks time with separate registers for hours,
minutes, and seconds. The calendar registers track date,
month, year and day of the week and are accurate through
2099, with automatic leap year correction.
Daylight Savings time adjustment is done automatically,
using parameters entered by the user. Power fail and battery
monitors offer user-selectable trip levels. The time stamp
function records the time and date of switchover from VDD to
VBAT power, and also from VBAT to VDD power.
Pinout
ISL12022M
(20 LD SOIC)
TOP VIEW
NC
NC
NC
NC
NC
GND
VBAT
GND
NC
NC
1
2
3
4
5
6
7
8
9
10
20 NC
19 NC
18 NC
17 NC
16 NC
15 GND
14 VDD
13 IRQ/FOUT
12 SCL
11 SDA
Features
• Embedded 32.768kHz Quartz Crystal in the Package
• 20 Ld SOIC Package (for DFN version, refer to the
ISL12020M)
• Real Time Clock/Calendar
- Tracks Time in Hours, Minutes and Seconds
- Day of the Week, Day, Month and Year
• On-chip Oscillator Temperature Compensation
- ±5ppm Accuracy Over -40°C to +85°C
• 10-bit Digital Temperature Sensor Output
- ±2°C Accuracy
• Customer Programmable Day Light Saving Time
• 15 Selectable Frequency Outputs
• 1 Alarm
- Settable to the Second, Minute, Hour, Day of the Week,
Day, or Month
- Single Event or Pulse Interrupt Mode
• Automatic Backup to Battery or Supercapacitor
- Operation to VBAT = 1.8V
- 1.0µA Battery Supply Current
• Battery Status Monitor
- 2 User Programmable Levels
- Seven Selectable Voltages for Each Level
• Battery Reseal™ Function to Extend Battery Shelf Life
• Power Status Brownout Monitor
- Six Selectable Trip Levels, from 2.295V to 4.675V
• Oscillator Failure Detection
• Time Stamp for First VDD to VBAT, and Last VBAT to VDD
Switchover
• 128 Bytes Battery-Backed User SRAM
• I2C-Bus™
- 400kHz Clock Frequency
Applications
• Utility Meters
• POS Equipment
• Medical Devices
• Printers and Copiers
• Digital Cameras
• Security Systems
• Vending Machine
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL
or
1-888I2-C46B8u-3s7i7s4a
| Intersil (and design) is a registered
registered trademark owned by NXP
trademark of Intersil Americas Inc.
Semiconductors Netherlands, B.V.
Copyright Intersil Americas Inc. 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.

1 page




ISL12022M pdf
ISL12022M
I2C Interface Specifications Test Conditions: VDD = +2.7 to +5.5V, Temperature = -40°C to +85°C,
unless otherwise specified. (Continued)
www.DataSheet4U.com
SYMBOL
PARAMETER
TEST CONDITIONS
MIN TYP MAX
(Note 10) (Note 6) (Note 10) UNITS
tSU:STO
tHD:STO
tDH
tR
tF
Cb
STOP Condition Setup Time
From SCL rising edge
crossing 70% of VDD, to SDA
rising edge crossing 30% of
VDD.
600
STOP Condition Hold Time
From SDA rising edge to
SCL falling edge. Both
crossing 70% of VDD.
600
Output Data Hold Time
From SCL falling edge
crossing 30% of VDD, until
SDA enters the 30% to 70%
of VDD window.
0
SDA and SCL Rise Time
From 30% to 70% of VDD. 20 + 0.1 x Cb
SDA and SCL Fall Time
From 70% to 30% of VDD. 20 + 0.1 x Cb
Capacitive Loading of SDA or SCL Total on-chip and off-chip
10
ns
ns
ns
300 ns
300 ns
400 pF
RPU
SDA and SCL Bus Pull-up Resistor
Off-chip
Maximum is determined by
tR and tF.
For Cb = 400pF, max is about
2kΩ~2.5kΩ.
For Cb = 40pF, max is about
15kΩ~20kΩ
1
kΩ
NOTES:
3. Temperature Conversion is inactive below VBAT = 2.7V. Device operation is not guaranteed at VBAT <1.8V.
4. IRQ/FOUT inactive.
5. VDD > VBAT +VBATHYS
6. Specified at +25°C.
7. In order to ensure proper timekeeping, the VDD SR- specification must be followed.
8. Limits should be considered typical and are not production tested.
9. These are I2C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate
specification.
10. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
NOTES
8, 9
8, 9
8, 9
8, 9
5 FN6668.4
December 18, 2008

5 Page





ISL12022M arduino
ISL12022M
Oscillator Compensation
The ISL12022M provides both initial timing correction and
temwwpewr.aDtautraeShcoeerrte4Uct.icoonmdue to variation of the crystal
oscillator. Analog and digital trimming control is provided for
initial adjustment, and a temperature compensation function
is provided to automatically correct for temperature drift of
the crystal. Initial values for the initial AT and DT settings
(ITR0), temperature coefficient (ALPHA), crystal capacitance
(BETA), as well as the crystal turn-over temperature (XTO),
are preset internally and recalled to RAM registers on
power-up. These values can be overwritten by the user
although this is not suggested as the resulting
temperature compensation performance will be
compromised. The compensation function can be
enabled/disabled at any time and can be used in battery
mode as well.
Register Descriptions
The battery-backed registers are accessible following a
slave byte of “1101111x” and reads or writes to addresses
[00h:13h]. The defined addresses and default values are
described in Table 1. The battery backed general purpose
SRAM has a different slave address (1010111x), so it is not
possible to read/write that section of memory while
accessing the registers.
REGISTER ACCESS
The contents of the registers can be modified by performing
a byte or a page write operation directly to any register
address.
The registers are divided into 8 sections. They are:
1. Real Time Clock (7 bytes): Address 00h to 06h.
2. Control and Status (9 bytes): Address 07h to 0Fh.
3. Alarm (6 bytes): Address 10h to 15h.
4. Time Stamp for Battery Status (5 bytes): Address 16h to
1Ah.
5. Time Stamp for VDD Status (5 bytes): Address 1Bh to
1Fh.
6. Day Light Saving Time (8 bytes): 20h to 27h.
7. TEMP (2 bytes): 28h to 29h.
8. Crystal Net PPM Correction, NPPM (2 bytes): 2Ah, 2Bh
9. Crystal Turnover Temperature, XT0 (1 byte): 2Ch
10. Crystal ALPHA at high temperature, ALPHA_H (1 byte):
2Dh
11. Scratch Pad (2 bytes): Address 2Eh and 2Fh
Write capability is allowable into the RTC registers (00h to
06h) only when the WRTC bit (bit 6 of address 08h) is set to
“1”. A multi-byte read or write operation is limited to one
section per operation. Access to another section requires a
new operation. A read or write can begin at any address
within the section.
A register can be read by performing a random read at any
address at any time. This returns the contents of that register
location. Additional registers are read by performing a
sequential read. For the RTC and Alarm registers, the read
instruction latches all clock registers into a buffer, so an
update of the clock does not change the time being read. At
the end of a read, the master supplies a stop condition to
end the operation and free the bus. After a read, the address
remains at the previous address +1 so the user can execute
a current address read and continue reading the next
register.
It is not necessary to set the WRTC bit prior to writing into
the control and status, alarm, and user SRAM registers.
TABLE 1. REGISTER MEMORY MAP (YELLOW SHADING INDICATES READ-ONLY BITS)
REG
BIT
ADDR. SECTION NAME
7
6
5
4
3
2
1
0
00h
SC
0
SC22
SC21
SC20
SC13
SC12
SC11
SC10
01h
MN
0
MN22
MN21
MN20
MN13
MN12
MN11
MN10
02h
HR MIL
0
HR21
HR20
HR13
HR12
HR11
HR10
03h RTC
DT
0
0
DT21
DT20
DT13
DT12
DT11
DT10
04h
MO 0
0
0
MO20
MO13
MO12
MO11
MO10
05h
YR
YR23
YR22
YR21
YR20
YR13
YR12
YR11
YR10
06h DW 0 0 0 0 0 DW2 DW1 DW0
RANGE DEFAULT
0 to 59
00h
0 to 59
00h
0 to 23
00h
1 to 31
01h
1 to 12
01h
0 to 99
00h
0 to 6
00h
11 FN6668.4
December 18, 2008

11 Page







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