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AA88347L Datasheet PDF - Agamem

Part Number AA88347L
Description 8-Bit DAC (#2)
Manufacturers Agamem 
Logo Agamem Logo 



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AA88347L datasheet, circuit
Agamem Technology Inc. AA88347L
PRELIMINARY
8-BIT DAC
FEATURE
www.DataSheet4U.com
12 bits serial data input(3 wire serial data
transfer method, DI, CLK, LD)
R-2R resistor ladder used for D/A conversion
8 channels with 8-bit resolution monotonic D/A
converter
8 channel buffer operational amplifiers operating
in the full voltage range from VCC to GND only
if VDD=VCC and VSS=GND
Max. 2.5 MHz serial digital data input
Serial I/O for cascade application
Max. 1.0 mA output drive/sink current
Two separate power supply/ground lines for
system and analog power supply
Single +3 V system power supply
Pin Assignment
VSS
AO2
AO3
AO4
AO5
AO6
AO7
VDD
1
2
3
4
5
6
7
8
(Top View)
16 GND
15 AO1
14 DI
13 CLK
12 LD
11 DO
10 AO8
9 VCC
DESCRIPTION
The AA88347L is a CMOS processed digital
to analog converter (DAC) with 8-bit redo-
lotion, low leakage current and low operating
current. The AA88347L has 8 channels with
build in operational amplifier output buffers
which could operate in the full-swing voltage
range from VCC to GND and enhance the
Drive/Sink ability up to max. 1mA.
Digital data(DI) input serially in a max. 2.5
MHz clock(CLK) rate. The latched 12-bit
digital data are converted into an analog DC
voltage in the range from VSS to VDD with
8-bit resolution in one of the eight channels by
the D/A converter in a max. 200 s settling
time.
AA88347L is a single 3V power DAC.
Analog DC output could be full voltage swing
as the analog power is equal to the system
power
In addition to normal D/A converter
applications, AA88347L is also available for
electronic volumes and instead of potentio -
meters for adjustment due to its high stability on
the capacitive load.
16 pins TSSOP package type are available for
AA88347L. Its operational temper- nature range
is specified over –20 to 85 .
1 2003/12/3

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AA88347L equivalent
Agamem Technology Inc. AA88347L
PRELIMINARY
8-BIT DAC
www.DataSheet4U.com Data Input Format
CLK
DI
MSB
D11 D10 D9
LD
AO1~8
Past Data
LSB
D2 D1 D0
New Data
Data Format in Shift Register
LSB MSB
DI D0 D 1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
Data Address
84
To Data Latch
To Address Decoder
DO
Data Conversion
Data
D7 D6 D5 D4 D3 D2 D1 D0
0 0000000
0 0000001
0 0000010
1 1111110
1 1111111
* LSB = (VDD-VSS)/255
5
DAC Output Level
AOx
VSS
VSS + LSB*
VSS + 2 * LSB
VDD - LSB
VDD
2003/12/3

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Information Total 10 Pages
Download[ AA88347L.PDF Datasheet ]

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