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PDF APW7025 Data sheet ( Hoja de datos )
| Número de pieza | APW7025 | |
| Descripción | Advanced PWM and Dual Linear Power Control | |
| Fabricantes | Anpec Electronics Coropration | |
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APW7025
Advanced PWM and Dual Linear Power Control
Features
General Description
• 3 Regulated Voltage are provided
• Switching Power for VTT(1.25V)
• Linear1 Regulator for FBVDDQ(2.5V)
www.DataSheet4U.com • Linear2 Regulator for NVVDD(2.05V)
• Simple Single-Loop Control Design
• Voltage-Mode PWM Control
• Excellent Output Voltage Regulation
• PWM Output: ±1%
• Linear Output: ±3%
• Fast Transient Response
• High-Bandwidth Error Amplifier
• Full 0% to 100% Duty Ratio
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
• Small Converter Size
• Constant Frequency Operation(200kHz)
• Programmable Oscillator from 50kHz to 1MHz
• Reduce External Component Count
Applications
• Motherboard Power Regulation for Computers
• Low-Voltage Distributed Power Supplies
• VGA Card Power Regulation
The APW7025 integrates a PWM controller and Dual
linear controller, as well as the monitoring and pro-
tection functions into a single package , which pro-
vides three controlled power outputs with over-volt-
age and over-current protections. The PWM control-
ler regulates the DDR reference voltage with a syn-
chronous-rectified buck converter. The linear control-
ler regulates power for microprocessor core voltage
and Memory Voltage.
The precision reference and voltage-mode PWM
control provide ±2% static regulation. The linear
controller drives an external N-channel MOSFET to
provide adjustable voltage.
The APW7025 monitors all the output voltages , and
a single Power Good signal is issued when the PWM
Voltage is within 10% of the 1.25V setting and the
other output levels are above their under-voltage
thresholds. Additional built-in over-voltage protec-
tion for the PWM output uses the lower MOSFET to
prevent output voltages above 115% of the 1.25V
setting. The PWM over-current function monitors
the output current by using the voltage drop across
the upper MOSFET’s RDS(ON) , eliminating the need
for a current sensing resistor.
Pin Description
VCC
DRIVE2
NC
NC
NC
NC
NC
PGOOD
VSEN2
SS
FAULT
NC
1
2
3
4
5
6
7
8
9
10
11
12
24 UGATE
23 PHASE
22 LGATE
21 PGND
20 OCSET
19 VSEN1
18 FB
17 COMP
16 VSEN3
15 DRIVE3
14 GND
13 VAUX
SOP24
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp.
Rev.P.1 - Mar., 2001
1
www.anpec.com.tw
1 page  
APW7025
Functional Pin Description Cont.
is internally pulled to VCC.
VAUX (Pin 13)
This pin provides boost current for the linear
regulator’s output drives in the event bipolar NPN tran-
sistors (instead of N-channel MOSFETs) are em-
ployed as pass elements. The voltage at this pin is
www.DataSheet4U.cmomonitored for power-on reset purposes.
GND (Pin 14)
current trip point. An over-current trip cycles the soft-
start function.
The voltage at this pin is monitored for power-on re-
set (POR) purposes and pulling this pin low with an
open drain device will shutdown the IC.
PGND (Pin 21)
This is the power ground connection. Tie the syn-
chronous PWM converter’s lower MOSFET source
to this pin.
Signal ground for the IC. All voltage levels are mea-
sured with respect to this pin.
DRIVE3 (Pin 15)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the FBVDDQ
regulator’s pass transistor.
VSEN3 (Pin 16)
Connect this pin to a resistor divider to set the linear
regulator (FBVDDQ) output voltage.
LGATE (Pin 22)
Connect LGATE to the PWM converter’s lower
MOSFET gate. This pin provides the gate drive for
the lower MOSFET.
PHASE (Pin 23)
Connect the PHASE pin to the PWM converter’s up-
per MOSFET source. This pin represents the gate
drive return current path and is used to monitor the
voltage drop across the upper MOSFET for over-cur-
rent protection.
COMP and FB (Pin 17, and 18)
UGATE (Pin 24)
COMP and FB are the available external pins of the
PWM converter error amplifier. The FB pin is the in-
verting input of the error amplifier. Similarly, the COMP
pin is the error amplifier output. These pins are used
to compensate the voltage-mode control feedback
loop of the synchronous PWM converter.
Connect UGATE pin to the PWM converter’s upper
MOSFET gate. This pin provides the gate drive for
the upper MOSFET.
VSEN1 (Pin 19)
This pin is connected to the PWM converter’s output
voltage. The PGOOD and OVP comparator circuits
use this signal to report output voltage status and for
over- voltage protection.
OCSET (Pin 20)
Connect a resistor from this pin to the drain of the
respective upper MOSFET. This resistor, an internal
200µA current source, and the upper MOSFET’s on-
resistance set the converter over-
Copyright ANPEC Electronics Corp.
Rev. P.1 - Mar., 2001
5
www.anpec.com.tw
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet APW7025.PDF ] | |
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