PDF AN-555 Data sheet ( Hoja de datos )

Número de pieza	AN-555
Descripción	Application Note
Fabricantes	Analog Device
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No Preview Available ! a AN-555 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • 781/329-4700 • World Wide Web Site: http://www.analog.com Using the AD9709, AD9763, AD9765, AD9767 Dual DAC Evaluation Board By Steve Reine and Dawn Ostenberg GENERAL DESCRIPTION The AD9709, AD9763, AD9765 and AD9767 are high- speed, high-performance dual DACs (8-, 10-, 12-, 14- www.DataSheebt4itUs.)codmesigned for I/Q transmit applications and for appli- cations where board space is at a premium. The evaluation board allows the user to take full advantage of the various modes in which the AD976x can operate. This includes operation as dual DACs with their own indi- vidual digital inputs, as well as interleaved DACs where data is alternately written from digital input Port 1 to either of the two DACs. Information on how to operate the evaluation board is included in this application note. However, for more detailed performance informa- tion, the reader should consult the individual data sheets for the AD9709, AD9763, AD9765, and AD9767. WORD GENERATOR CLOCK SOURCE DIGITAL DATA BUS CLK DATA IN DUAL DAC EVALUATION BOARD AVDD DVDD DATA OUT OSCILLOSCOPE SPECTRUM ANALYZER ACOM DCOM ANALOG VDD (3V TO 5V) DIGITAL VDD (3V TO 5V) Figure 1. Typical Test Setup to Evaluate Performance of AD976x Dual DAC Using Evaluation Board The 8-, 10-, 12-, and 14-bit DACs in this family are all pin- for-pin-compatible and are MSB justified. Therefore, the same evaluation board can be used to evaluate all four parts. EVALUATION SETUP To evaluate the performance of the AD976x dual DAC family, a small set of measurement and signal genera- tion equipment is needed. Figure 1 shows a typical test setup. Power supplies capable of driving from 3 V to 5 V are needed for both analog and digital circuitry on the evaluation board. A signal generator and digital word generator are needed to provide the data and clock inputs. On the output, an oscilloscope or spectrum analyzer may be needed, depending on the type of per- formance being analyzed. TP10 L1 DVDDIN BEAD BAN-JACK DVDD C9 10␮F 25V TP37 TP38 TP39 POWER CONNECTIONS The AD9709, AD9763, AD9765, AD9767 dual DACs all have separate digital and analog power and ground pins. Analog and digital power and ground have their own banana-style connectors on the dual DAC evaluation board. The best performance when using the evaluation board is achieved when analog and digital power and ground are connected to separate power supplies. Figure 2 shows the power supply, grounding, and decou- pling connections for the evaluation board and for the DAC itself. Note that for best noise rejection on the power supplies, the high value bulk capacitors are placed at the external power connectors, while the smaller value capacitors, needed for high frequency rejection, are located close to the DAC. TP11 L2 AVDD AVDDIN BEAD BAN-JACK C10 10␮F 25V TP40 TP41 TP42 BAN-JACK DVDD C1 0.001␮F C2 0.01␮F C3 0.1␮F TP43 DGND BAN-JACK DVDD1 DVDD2 AVDD DCOM1 DCOM2 AD9709 AD9763 AD9765 AD9767 DUAL DAC ACOM C13 0.1␮F AVDD TP44 C12 0.01␮F C11 0.001␮F AGND Figure 2. Analog and Digital Power Connections on Dual DAC Evaluation Board REV. 0 1 page REFIO (C14) may need to be removed under these condi- tions. Figures 7 and 8 show the internal and external ref- erence configurations for the AD9709, AD9763, AD9765, and AD9767. When using an external reference in this way, the full- scale output current for each DAC can be defined by; IOUTFS = 32 × VREF/REXT Note that in the internal reference configuration, any additional load on the reference should be buffered with an external amplifier. This external amplifier is not included on the evaluation board. www.DataSheeFt4oUr.cmomore detailed information on the operation of the reference section of the DACs, see page 9 of the data sheet. OPTIONAL EXTERNAL REFERENCE BUFFER ADDITIONAL EXTERNAL LOAD GAINCTRL 0.1␮F +1.2V REF REFIO FSADJ IREF 2k⍀ AVDD DUAL DAC REFERENCE SECTION CURRENT SOURCE ARRAY ACOM Figure 7. Internal Reference Configuration GAINCTRL AVDD EXTERNAL REFERENCE +1.2V REF REFIO FSADJ IREF 2k⍀ AVDD DUAL DAC REFERENCE SECTION CURRENT SOURCE ARRAY ACOM Figure 8. External Reference Configuration MASTER/SLAVE RESISTOR MODE, GAINCTRL The AD9709, AD9763, AD9765, AD9767 all allow the gain of each channel to be independently set by connecting one RSET resistor to FSADJ1 and another RSET resistor to FSADJ2. To add flexibility and reduce system cost, a single RSET resistor can be used to set the gain of both channels simultaneously. When GAINCTRL is low (i.e., connected to AGND), the independent channel gain control mode using two resis- tors is enabled. In this mode, individual RSET resistors should be connected to FSADJ1 and FSADJ2. When GAINCTRL is high (i.e., connected to AVDD), the master/ slave channel gain control mode using one resistor is AN-555 enabled. In this mode, a single RSET resistor is connected to FSADJ1 and the resistor on FSADJ2 can be removed. Note: Only parts with date code of 9930 or later have the Master/Slave GAINCTRL function. For parts prior to this date code, Pin 42 must be connected to AGND, and the part will operate in the two resistor, independent gain control mode. OUTPUT CONFIGURATION The AD9709, AD9763, AD9765, AD9767 have been designed to achieve optimum performance with the outputs used differentially. A transformer on the evalua- tion board (Mini-Circuits T1–1T) allows the conversion of the differential outputs to a single-ended signal. The bandwidth of this transformer allows low distortion operation from 350 kHz to well past the Nyquist bandwidth of the DAC when operating at its highest sampling rate. Figure 9 shows a typical DAC output configuration. Both outputs drive a 50 Ω resistor as well as a transformer. The grounded centertap on the primary of the trans- former causes the output of the DAC to swing around ground, allowing for wider p-p swing while still remain- ing within the output voltage compliance range of the DAC. On the evaluation board, these resistors are R5, R6, R7, and R8. This provides a full-scale differential out- put voltage of 0.67 V p-p when operating with IOUTFS = 20 mA and the transformer terminated with 50 Ω. If the secondary of the transformer is terminated with 50 Ω, the DAC will then be capable of driving 0.5 dBm into this load at full-scale out. C4, C5, C6, and C15 (10 pF) on the evaluation board, working together with the 50 Ω output resistors, form a low-pass filter which gives some amount of image rejec- tion at higher output frequencies. In applications where an amplifier is used in place of the transformer, it is important that the capacitor values be chosen to limit the output slew rate of the DAC. If the output of the amplifier becomes slew rate limited, severe distortion can result. IOUT AD9709 AD9763 AD9765 AD9767 IOUT 10pF 50⍀ 50⍀ 10pF 50⍀ Figure 9. Typical DAC Output Configuration REV. 0 –5– 5 Page AN-555 www.DataSheet4U.com Figure 15. Layer 1, Top Side REV. 0 Figure 16. Layer 2, Ground Plane –11– 11 Page

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