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PDF ASM708 Data sheet ( Hoja de datos )

Número de pieza ASM708
Descripción (ASMxxxx) Low Power UP Supervisor Circuits
Fabricantes Alliance Semiconductor Corporation 
Logotipo Alliance Semiconductor Corporation Logotipo



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No Preview Available ! ASM708 Hoja de datos, Descripción, Manual

July 2004
ASM705 / 706 / 707 / 708
ASM813L
rev 1.2
Low Power µP Supervisor Circuits
General Description
Features
The ASM705 / 706 / 707 / 708 and AS813L are cost effective
CMOS supervisor circuits that monitor power-supply and
battery voltage level, and µP/µC operation.
The family offers several functional options. Each device
generates a reset signal during power-up, power-down and
during brownout conditions. A reset is generated when the
supply drops below 4.65V (ASM705/707/813L) or 4.40V
(ASM706/708). For 3V power supply applications, refer to the
ASM705P/R/S/T data sheet. In addition, the ASM705/706/813L
www.DafetaatSurheeaet14.6Us.ceocomnd watchdog timer. The ASM707/708 have
both active-HIGH and active-LOW reset outputs but no
watchdog function. The ASM813L has the same pin-out and
functions as the ASM705 but has an active-HIGH reset output.
A versatile power-fail circuit has a 1.25V threshold, useful in low
battery detection and for monitoring non-5V supplies. All
devices have a manual reset (MR) input. The watchdog timer
output will trigger a reset if connected to MR.
All devices are available in 8-pin DIP, SO and MicroSO
packages.
• Precision power supply monitor
•4.65V threshold (ASM705/707/813L)
•4.40V threshold (ASM706/708)
• Debounced manual reset input
• Voltage monitor
•1.25V threshold
•Battery monitor / Auxiliary supply monitor
• Watchdog timer (ASM705/706/813L)
• 200ms reset pulse width
• Active HIGH reset output (ASM707/708/813L)
• MicroSO package
Applications
• Computers and embedded controllers
• Portable/Battery-operated systems
• Intelligent instruments
• Wireless communication systems
• PDAs and hendheld equipment
• Automative Systems
• Safety Systems
Typical Operating Circuit
Unregulated DC
+5V Regulator
R1
VCC RESET
(RESET)
PFI
ASM705 WDI
ASM706
R2
(ASM813L) WDO
MR
PFO
µP
VCC
RESET
(RESET)
I/O LINE
NMI
INTERRUPT
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice

1 page




ASM708 pdf
July 2004
ASM705 / 706 / 707 / 708
ASM813L
rev 1.2
transitions at WDI will reset the watchdog timer and initiate a
new countdown sequence.
WDO will also become LOW and remain so, whenever the
supply voltage, VCC , falls below the device threshold level.
WDO goes HIGH as soon as VCC transitions above the
threshold. There is no minimum pulse width for WDO as
there is for the RESET outputs. If WDI is floated, WDO
essentially acts as a low-power output indicator.
www.DataSheet4U.com
WDI
BUF Buffered
RESET
VCC
Supply Voltage
ASM70x
RESET
GND
4.7k
µC or µP
RInEpSuEtT
GND
Bi-directional I/O Pin
Figure 3: Bi-directional Reset Pin Interfacing
WDO
RESET
RESET
Figure 2: Watchdog Timing
Application Information
Ensuring That RESET is Valid Down to VCC = 0V
When VCC falls below 1.1V, the ASM705-708 RESET output
no longer pulls down; it becomes indeterminate. To avoid the
possibility that stray charges build up and force RESET to the
wrong state, a pull-down resistor should be connected to the
RESET pin, thus draining such charges to ground and
holding RESET low. The resistor value is not critical. A 100k
resistor will pull RESET to ground without loading it.
Bi-directional Reset Pin Interfacing
The ASM705/6/7/8 can interface with µP/µC bi-directional
reset pins by connecting a 4.7kresistor in series with the
RESET output and the µP/µC bi-directional RESET pin.
Monitoring Voltages Other Than VCC
The ASM705-708 can monitor voltages other than VCC using
the Power Fail circuitry. If a resistive divider is connected
from the voltage to be monitored to the Power Fail input
(PFI), the PFO will go LOW if the voltage at PFI goes below
1.25V reference. Should hysteresis be desired, connect a
resistor (equal to approximately 10 times the sum of the two
resistors in the divider) between the PFI and PFO pins. A
capacitor between PFI and GND will reduce circuit sensitivity
to input high-frequency noise. If it is desired to assert a
RESET for voltages other than VCC then the PFO output is to
be connected to the MR.
VIN
R1
+5V
VCC
MR
ASM70X PFO
PFI
R2
GND RESET
To µP
Figure 4: Monitoring +5V and an additional supply VIN
Low Power µP Supervisor Circuits
5 of 15
Notice: The information in this document is subject to change without notice

5 Page





ASM708 arduino
July 2004
rev 1.2
Package Dimensions (contd)
D1
ASM705 / 706 / 707 / 708
ASM813L
Plastic DIP (8-Pin)
www.DataSheet4U.com
D
b2
e
b
A1 A
L
0° -15°
E
E1
eC
eA
eB
Inches
Min
A-
Max
0.210
A1 0.015
-
A2 0.115
0.195
b 0.014
0.022
b2 0.045
0.070
b3 0.030
0.045
D 0.355
0.400
D1 0.005
-
E 0.300
0.325
E1 0.240
0.280
e 0.100
-
eA 0.300
-
eB -
0.430
eC -
0.060
L 0.115
0.150
Millimeteres
Min Max
- 5.33
0.38 -
2.92 4.95
0.36 0.56
1.14 1.78
0.80 1.14
9.02 10.16
0.13 -
7.62 8.26
6.10 7.11
2.54
7.62
- 10.92
2.92 3.81
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
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