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PDF STM32F103x6 Data sheet ( Hoja de datos )
| Número de pieza | STM32F103x6 | |
| Descripción | ARM-based 32-bit MCU | |
| Fabricantes | STMicroelectronics | |
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STM32F103x6
STM32F103x8 STM32F103xB
Performance line, ARM-based 32-bit MCU with Flash, USB, CAN,
seven 16-bit timers, two ADCs and nine communication interfaces
Preliminary Data
Features
■ Core: ARM 32-bit Cortex™-M3 CPU
www.DataSheet4U.com– 72 MHz, 90 DMIPS with 1.25 DMIPS/MHz
– Single-cycle multiplication and hardware
division
– Nested interrupt controller with 43
maskable interrupt channels
– Interrupt processing (down to 6 CPU
cycles) with tail chaining
■ Memories
– 32-to-128 Kbytes of Flash memory
– 6-to-20 Kbytes of SRAM
■ Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR, and programmable voltage
detector (PVD)
– 4-to-16 MHz quartz oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 32 kHz RC
– PLL for CPU clock
– Dedicated 32 kHz oscillator for RTC with
calibration
■ Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC and backup registers
■ 2 x 12-bit, 1 µs A/D converters (16-channel)
– Conversion range: 0 to 3.6 V
– Dual-sample and hold capability
– Synchronizable with advanced control timer
– Temperature sensor
■ DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
I2Cs and USARTs
LQFP48
7 x 7 mm
LQFP100
14 x 14 mm
LQFP64
10 x 10 mm
BGA100
10 x 10 mm
■ Debug mode
– Serial wire debug (SWD) & JTAG interfaces
■ Up to 80 fast I/O ports
– 32/49/80 5 V-tolerant I/Os
– All mappable on 16 external interrupt
vectors
– Atomic read/modify/write operations
■ Up to 7 timers
– Up to three 16-bit timers, each with up to 4
IC/OC/PWM or pulse counter
– 16-bit, 6-channel advanced control timer:
up to 6 channels for PWM output
Dead time generation and emergency
stop
– 2 x 16-bit watchdog timers (Independent
and Window)
– SysTick timer: a 24-bit downcounter
■ Up to 9 communication interfaces
– Up to 2 x I2C interfaces (SMBus/PMBus)
– Up to 3 USARTs (ISO 7816 interface, LIN,
IrDA capability, modem control)
– Up to 2 SPIs (18 Mbit/s)
– CAN interface (2.0B Active)
– USB 2.0 full speed interface
Table 1. Device summary
Reference
Root part number
STM32F103x6 STM32F103C6, STM32F103R6
STM32F103x8
STM32F103C8, STM32F103R8
STM32F103V8
STM32F103xB STM32F103RB STM32F103VB
July 2007
Rev 2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/67
www.st.com
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1 page  
STM32F103xx
List of figures
List of figures
Figure 1.
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www.DataSheet4UF.ciogmure 8.
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Figure 22.
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Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
STM32F103xx performance line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
STM32F103xx performance line LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
STM32F103xx performance line LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
STM32F103xx performance line LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
STM32F103xx performance line BGA100 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Typical application with a 8-MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Unused I/O pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
I2C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
SPI timing diagram - slave mode and CPHA = 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
SPI timing diagram - master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . . 57
Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . . 57
LFBGA100 - low profile fine pitch ball grid array package outline . . . . . . . . . . . . . . . . . . . 59
Recommended PCB design rules (0.80/0.75 mm pitch BGA) . . . . . . . . . . . . . . . . . . . . . . 60
LQFP100 – 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . 61
LQFP64 – 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
LQFP48 – 48 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
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5 Page 
STM32F103xx
Description
www.DataSheet4U.com
RTC (real-time clock) and backup registers
The RTC and the backup registers are supplied through a switch that takes power either on
VDD supply when present or through the VBAT pin. The backup registers (ten 16-bit
registers) can be used to store data when VDD power is not present.
The real-time clock provides a set of continuously running counters which can be used with
suitable software to provide a clock calendar function, and provides an alarm interrupt and a
periodic interrupt. It is clocked by an external 32.768 kHz oscillator, the internal low power
RC oscillator or the High Speed External clock divided by 128. The internal low power RC
has a typical frequency of 32 kHz. The RTC can be calibrated using an external 512 Hz
output to compensate for any natural quartz deviation. The RTC features a 32-bit
programmable counter for long term measurement using the Compare register to generate
an alarm. A 20-bit prescaler is used for the time base clock and is by default configured to
generate a time base of 1 second from a clock at 32.768 kHz.
Independent watchdog
The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is
clocked from an independent 32 kHz internal RC and as it operates independently from the
main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog
to reset the device when a problem occurs, or as a free running timer for application time out
management. It is hardware or software configurable through the option bytes. The counter
can be frozen in debug mode.
Window watchdog
The window watchdog is based on a 7-bit downcounter that can be set as free running. It
can be used as a watchdog to reset the device when a problem occurs. It is clocked from the
main clock. It has an early warning interrupt capability and the counter can be frozen in
debug mode.
SysTick timer
This timer is dedicated for OS, but could also be used as a standard down counter. It
features:
● A 24-bit down counter
● Autoreload capability
● Maskable system interrupt generation when the counter reaches 0.
● Programmable clock source
General purpose timers (TIMx)
There are up to 3 synchronizable standard timers embedded in the STM32F103xx
performance line devices. These timers are based on a 16-bit auto-reload up/down counter,
a 16-bit prescaler and feature 4 independent channels each for input capture/output
compare, PWM or one pulse mode output. This gives up to 12 input captures / output
compares / PWMs on the largest packages. They can work together with the Advanced
Control Timer via the Timer Link feature for synchronization or event chaining.
The counter can be frozen in debug mode.
Any of the standard timers can be used to generate PWM outputs. Each of the timers has
independent DMA request generations.
11/67
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| PDF Descargar | [ Datasheet STM32F103x6.PDF ] | |
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