3C44B0 Datasheet PDF - Samsung semiconductor
Part Number | 3C44B0 | |
Description | RISC MICROPROCESSOR | |
Manufacturers | Samsung semiconductor | |
Logo | ||
There is a preview and 3C44B0 download ( pdf file ) link at the bottom of this page. Total 30 Pages |
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PRODUCT OVERVIEW
1 PRODUCT OVERVIEW
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SAMSUNG's S3C44B0X 16/32-bit RISC microprocessor is designed to provide a cost-effective and high performance
micro-controller solution for hand-held devices and general applications. To reduce total system cost, S3C44B0X
also provides the following: 8KB cache, optional internal SRAM, LCD controller, 2-channel UART with handshake, 4-
channel DMA, System manager (chip select logic, FP/ EDO/SDRAM controller), 5-channel timers with PWM, I/O
ports, RTC, 8-channel 10-bit ADC, IIC-BUS interface, IIS-BUS interface, Sync. SIO interface and PLL for clock.
The S3C44B0X was developed using a ARM7TDMI core, 0.25 um CMOS standard cells, and a memory compiler. Its
low-power, simple, elegant and fully static design is particularly suitable for cost-sensitive and power sensitive
applications. Also S3C44B0X adopts a new bus architecture, SAMBA II (SAMSUNG ARM CPU embedded
Microcontroller Bus Architecture).
An outstanding feature of the S3C44B0X is its CPU core, a 16/32-bit ARM7TDMI RISC processor (66MHz) designed
by Advanced RISC Machines, Ltd. The architectural enhancements of ARM7TDMI include the Thumb de-
compressor, an on-chip ICE breaker debug support, and a 32-bit hardware multiplier.
By providing a complete set of common system peripherals, the S3C44B0X minimizes overall system costs and
eliminates the need to configure additional components. The integrated on-chip functions that are described in this
document are as follows:
• 2.5V Static ARM7TDMI CPU core with 8KB cache . (SAMBA II bus architecture up to 66MHz)
• External memory controller. (FP/EDO/SDRAM Control, Chip Select logic)
• LCD controller (up to 256 color DSTN) with 1-ch LCD-dedicated DMA.
• 2-ch general DMAs / 2-ch peripheral DMAs with external request pins
• 2-ch UART with handshake(IrDA1.0, 16-byte FIFO) / 1-ch SIO
• 1-ch multi-master IIC-BUS controller
• 1-ch IIS-BUS controller
• 5-ch PWM timers & 1-ch internal timer
• Watch Dog Timer
• 71 general purpose I/O ports / 8-ch external interrupt source
• Power control: Normal, Slow, Idle, and Stop mode
• 8-ch 10-bit ADC.
• RTC with calendar function.
• On-chip clock generator with PLL.
1-1
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S3C44B0X RISC MICROPROCESSOR
BLOCK DIAGRAM
PRODUCT OVERVIEW
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JTAG Boundary Scan
ARM7TDMI TAP
Controller
Clock Generator
(PLL)
AIN[7:0]
32,768 Hz
Bus Arbiter
CPU Unit
Write Buffer
ARM7TDMI
CPU Core
Cache 8K-byte
Power
Management
Memory I/F
ROM/SRAM
S DRAM/SDRAM
y
s
t
LCD LCD
e DMA CONT.
m
Interrupt CONT.
B
u
s
ZDMA (2-Ch)
System Bus Bridge & Arbitration /
BDMA (2-Ch)
ADC
Watchdog Timer
RTC
(Real Time Clock)
P
e
r
i
p
h
e
r
a
l
B
u
s
GPIO
(Controller)
I2C Bus
Controller
I2S Bus
Controller
UART 0,1 (Each
16byte FIFO)
Synchronout I/O
PWM Timer
0-4,5 (internal)
G
e
n
e
r
a
l
P
u
r
p
o
s
e
I
/
O
SIOCK
TCLK
EXTCLK
Figure 1-1. S3C44B0X Block Diagram
1-5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 3C44B0 electronic component. |
Information | Total 30 Pages | |
Link URL | [ Copy URL to Clipboard ] | |
Download | [ 3C44B0.PDF Datasheet ] |
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