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PDF 18F4539 Data sheet ( Hoja de datos )
| Número de pieza | 18F4539 | |
| Descripción | PIC18F4539 | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 18F4539 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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PIC18FXX39
Data Sheet
Enhanced FLASH Microcontrollers
with Single Phase Induction
Motor Control Kernel
2002 Microchip Technology Inc.
Preliminary
DS30485A
1 page  
Pin Diagrams (Cont.’d)
PIC18FXX39
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40-Pin DIP
MCLR/VPP
RA0/AN0
RA1/AN1
RA2/AN2/VREF-
RA3/AN3/VREF+
RA4/T0CKI
RA5/AN4/SS/LVDIN
RE0/AN5/RD
RE1/AN6/WR
RE2/AN7/CS
VDD
VSS
OSC1/CLKI
OSC2/CLKO/RA6
RC0/T13CKI
PWM2
PWM1
RC3/SCK/SCL
RD0/PSP0
RD1/PSP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 RB7/PGD
39 RB6/PGC
38 RB5/PGM
37 RB4
36 RB3
35 RB2/INT2
34 RB1/INT1
33 RB0/INT0
32 VDD
31 VSS
30 RD7/PSP7
29 RD6/PSP6
28 RD5/PSP5
27 RD4/PSP4
26 RC7/RX/DT
25 RC6/TX/CK
24 RC5/SDO
23 RC4/SDI/SDA
22 RD3/PSP3
21 RD2/PSP2
28-Pin DIP, SOIC
MCLR/VPP
RA0/AN0
RA1/AN1
RA2/AN2/VREF-
RA3/AN3/VREF+
RA4/T0CKI
RA5/AN4/SS/LVDIN
VSS
OSC1/CLKI
OSC2/CLKO/RA6
RC0/T13CKI
PWM2
PWM1
RC3/SCK/SCL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 RB7/PGD
27 RB6/PGC
26 RB5/PGM
25 RB4
24 RB3
23 RB2/INT2
22 RB1/INT1
21 RB0/INT0
20 VDD
19 VSS
18 RC7/RX/DT
17 RC6/TX/CK
16 RC5/SDO
15 RC4/SDI/SDA
2002 Microchip Technology Inc.
Preliminary
DS30485A-page 3
5 Page 
PIC18FXX39
FIGURE 1-1:
PIC18F2X39 BLOCK DIAGRAM
Data Bus<8>
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21
Address Latch
Program Memory
(up to 2 Mbytes)
Data Latch
16
21 Table Pointer
inc/dec logic
88
8
21 PCLATU PCLATH
PCU PCH PCL
Program Counter
31 Level Stack
Data Latch
Data RAM
Address Latch
12 (2)
Address<12>
4
BSR
12
FSR0
FSR1
FSR2
4
Bank0, F
12
Table Latch
Decode
inc/dec
logic
8
ROM Latch
OSC2/CLKO
OSC1/CLKI
T1OSCI
T1OSCO
MCLR
VDD, VSS
Instruction
Decode &
Control
Timing
Generation
4X PLL
Precision
Voltage
Reference
Instruction
Register
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Low Voltage
Programming
In-Circuit
Debugger
8
PRODH PRODL
3 8 x 8 Multiply
8
BIT OP
8
WREG
8
8
8
ALU<8>
8
PORTA
PORTB
PORTC
RA0/AN0
RA1/AN1
RA2/AN2/VREF-
RA3/AN3/VREF+
RA4/T0CKI
RA5/AN4/SS/LVDIN
RA6
RB0/INT0
RB1/INT1
RB2/INT2
RB3
RB4
RB5/PGM
RB6/PGC
RB7/PGD
RC0/T13CKI
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
PWM1
PWM2
Timer0
Timer1
Timer2
Timer3
A/D Converter
PWM1
PWM2
Master
Synchronous
Serial Port
Addressable
USART
Data EEPROM
Note
1: The high order bits of the Direct Address for the RAM are from the BSR register (except for the MOVFF instruction).
2: Many of the general purpose I/O pins are multiplexed with one or more peripheral module functions. The multiplexing combinations
are device dependent.
2002 Microchip Technology Inc.
Preliminary
DS30485A-page 9
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet 18F4539.PDF ] | |
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