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Features
D Wide speed range
Ċ 45 ns to 200 ns (commercial and
military)
D Low power
Ċ 248 mW (commercial)
Ċ 303 mW (military)
D Low standby power
Ċ Less than 83 mW when deselected
www.DataSheetD4U±.c1o0m% Power supply tolerance
Functional Description
The CY27C128 is a highĆperformance
16,384Ćword by 8Ćbit CMOS EPROM.
When disabled (CE HIGH), the
CY27C128
128K (16K x 8ĆBit) CMOS EPROM
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The CY27C128 is also available in a CerĆ
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telligent programming algorithms.
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programming yield. The EPROM cell reĆ
quires only 12.5V for the super voltage,
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into, erased, and repeatedly exercised
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specification limits.
Reading the CY27C128 is accomplished
by placing active LOW signals on OE and
CE . The contents of the memory location
addressed by the address lines (A
will become available on the output
line0s
-
A
13
)
(O 0 - O 7).
Logic Block Diagram
A 13
A 12
A 11
A 10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
ROW
ADDRESS
ADDRESS
DECODER
COLUMN
ADDRESS
128 x 1024
PROGRAMABLE
ARRAY
8 x 1 OF 128
MULTIPLEXER
POWERĆDOWN
Pin Configurations
O7
O6
O5
O4
O3
O2
O1
DIP/Flatpack
V PP
A 12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1 28
2 27
3 26
4 25
5
27C128
6
24
23
7 22
8 21
9
10
11
12
13
20
19
18
17
16
14
15
V CC
PGM
A 13
A8
A9
A 11
OE
A 10
CE
O7
O6
O5
O4
O3
C128Ć2
LCC/PLCC [1]
A6
A5
A4
A3
A2
A1
A0
NC
O0
4 3 2 1 32 31 30
5
6
7
8
9
10
11
12
13
27C128
29
28
27
26
25
24
23
22
21
14 15 16 17 1819 20
A8
A9
A 11
NC
OE
A 10
CE
O7
O6
C128Ć3
CE
OE
O0
C128Ć1
Selection Guide
27C128-45 27C128-55
MaximumAccessTime(ns) 45 55
MOCuparexrriemantuitnm(gmA) [2]
S(mtaAnAd))by CuCrurerrnetnt
Com'l
Mil
Com'l
Mil
45
55
15
20
45
55
15
20
Chip Select Time (ns)
45 55
Output Enable Time (ns)
15 20
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27C128-70
70
45
55
15
20
70
25
27C128-90
90
45
55
15
20
90
30
27C128-120
120
45
55
15
20
120
30
27C128-150
150
45
55
15
20
150
40
2. Add 2 mA/MHz for AC power component.
27C128-200
200
45
55
15
20
200
40
Cypress Semiconductor Corporation
D 3901 North First Stree1t
D San Jose D CA 95134 D 408-943-2600
February 1994