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PDF LNK363 Data sheet ( Hoja de datos )

Número de pieza LNK363
Descripción (LNK362 - LNK364) Low Power Off-Line Switcher IC
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LNK362-364
LinkSwitch®-XT Family
Energy Efcient, Low Power
Off-Line Switcher IC
Product Highlights
Optimized for Lowest System Cost
• Proprietary IC trimming and transformer construction
techniques enable Clampless™ designs with LNK362
for lower system cost, component count and higher
efciency
• Fully integrated auto-restart for short circuit and
open loop protection
• Self-biased supply – saves transformer auxiliary winding
and associated bias supply components
• Frequency jittering greatly reduces EMI
• Meets HV creepage requirements between DRAIN and
all other pins both on the PCB and at the package
• Lowest component count switcher solution
Features Superior to Linear/RCC
• Accurate hysteretic thermal shutdown protection –
automatic recovery improves eld reliability
• Universal input range allows worldwide operation
• Simple ON/OFF control, no loop compensation needed
• Eliminates bias winding – simpler, lower cost
transformer
• Very low component count – higher reliability and single
side printed circuit board
• Auto-restart reduces delivered power by 95% during
short circuit and open loop fault conditions
• High bandwidth provides fast turn-on with no overshoot
and excellent transient load response
EcoSmart®– Extremely Energy-Efcient
• Easily meets all global energy efciency regulations with
no added components
• No-load consumption <300 mW without bias winding at
265 VAC input (<50 mW with bias winding)
• ON/OFF control provides constant efciency to very
light loads – ideal for mandatory CEC regulations
Applications
• Chargers/adapters for cell/cordless phones, PDAs, digital
cameras, MP3/portable audio players, and shavers
• Supplies for appliances, industrial systems, and metering
Description
LinkSwitch-XT incorporates a 700Vpower MOSFET, oscillator,
simple ON/OFF control scheme, a high-voltage switched current
source, frequency jittering, cycle-by-cycle current limit and
thermal shutdown circuitry onto a monolithic IC. The startup
+ DC +
Output
Wide Range
HV DC Input
LinkSwitch-XT
D LNK362
FB
BP
S
a) Clampless yback converter with LNK362
+
PI-4086-081005
DC +
Output
Wide Range
HV DC Input
LinkSwitch-XT
D LNK363-364
FB
BP
S
b) Flyback converter with LNK363/4
PI-4061-081005
Figure 1. Typical Application with LinkSwitch-XT.
OUTPUT POWER TABLE(4)
230 VAC ±15%
85-265 VAC
PRODUCT(3)
Adapter(1)
Open
Frame(2)
Adapter(1)
Open
Frame(2)
LNK362P/G/D 2.8 W 2.8 W 2.6 W 2.6 W
LNK363P/G/D 5 W
7.5 W 3.7 W 4.7 W
LNK364P/G/D 5.5 W
9W
4W
6W
Table 1. Output Power Table.
Notes:
1. Minimum continuous power in a typical non-ventilated enclosed
adapter measured at 50 °C ambient.
2. Minimum practical continuous power in an open frame design
with adequate heat sinking, measured at 50 °C ambient.
3. Packages: P: DIP-8B, G: SMD-8B, D: SO-8C. Please see Part
Ordering Information.
4. See Key Application Considerations section for complete description
of assumptions.
and operating power are derived directly from the DRAIN
pin, eliminating the need for a bias winding and associated
circuitry.
November 2008

1 page




LNK363 pdf
The LinkSwitch-XT is completely self-powered from the DRAIN
pin, requiring only a small ceramic capacitor C3 connected to
the BYPASS pin. No auxiliary winding on the transformer is
required.
Key Application Considerations
LinkSwitch-XT Design Considerations
Output Power Table
The data sheet maximum output power table (Table 1) represents
the maximum practical continuous output power level that can
be obtained under the following assumed conditions:
1. The minimum DC input voltage is 90 V or higher for 85 VAC
input, or 240 V or higher for 230 VAC input or 115 VAC
with a voltage doubler. The value of the input capacitance
should be large enough to meet these criteria for AC input
designs.
2. Secondary output of 6 V with a fast PN rectier diode.
3. Assumed efciency of 70%.
4. Voltage only output (no secondary-side constant current
circuit).
5. Discontinuous mode operation (KP >1).
6. A primary clamp (RCD or Zener) is used.
7. The part is board mounted with SOURCE pins soldered
to a sufcient area of copper to keep the SOURCE pin
temperature at or below 100 °C.
8. Ambient temperature of 50 °C for open frame designs
and an internal enclosure temperature of 60 °C for adapter
designs.
Below a value of 1, KP is the ratio of ripple to peak primary
current. Above a value of 1, KP is the ratio of primary MOSFET
OFF time to the secondary diode conduction time. Due to
the ux density requirements described below, typically a
LinkSwitch-XT design will be discontinuous, which also has
the benets of allowing lower cost fast (instead of ultra-fast)
output diodes and reducing EMI.
Clampless Designs
Clampless designs rely solely on the drain node capacitance
to limit the leakage inductance induced peak drain-to-source
voltage. Therefore, the maximum AC input line voltage, the
value of VOR, the leakage inductance energy, a function of
leakage inductance and peak primary current, and the primary
winding capacitance determine the peak drain voltage. With no
signicant dissipative element present, as is the case with an
external clamp, the longer duration of the leakage inductance
ringing can increase EMI.
The following requirements are recommended for a universal
input or 230 VAC only Clampless design:
1. A Clampless design should only be used for PO 2.5 W,
using the LNK362and a VOR** 90 V.
LNK362-364
2. For designs where PO 2 W, a two-layer primary should be
used to ensure adequate primary intra-winding capacitance
in the range of 25 pF to 50 pF.
3. For designs where 2 < PO 2.5 W, a bias winding should be
added to the transformer using a standard recovery rectier
diode to act as a clamp. This bias winding may also be used
to externally power the device by connecting a resistor from
the bias-winding capacitor to the BYPASS pin. This inhibits
the internal high-voltage current source, reducing device
dissipation and no-load consumption.
4. For designs where PO > 2.5 W Clampless designs are not
practical and an external RCD or Zener clamp should be
used.
5. Ensure that worst-case high line, peak drain voltage is below
the BVDSS specication of the internal MOSFET and ideally
650 V to allow margin for design variation.
†For 110 VAC only input designs it may be possible to extend
the power range of Clampless designs to include the LNK363.
However, the increased leakage ringing may degrade EMI
performance.
**VOR is the secondary output plus output diode forward voltage
drop that is reected to the primary via the turns ratio of the
transformer during the diode conduction time. The VOR adds
to the DC bus voltage and the leakage spike to determine the
peak drain voltage.
Audible Noise
The cycle skipping mode of operation used in LinkSwitch-XT
can generate audio frequency components in the transformer.
To limit this audible noise generation, the transformer should
be designed such that the peak core ux density is below
1500 Gauss (150 mT). Following this guideline and using the
standard transformer production technique of dip varnishing
practically eliminates audible noise. Vacuum impregnation
of the transformer should not be used due to the high primary
capacitance and increased losses that result. Higher ux densities
are possible, however careful evaluation of the audible noise
performance should be made using production transformer
samples before approving the design.
Ceramic capacitors that use dielectrics, such as Z5U, when
used in clamp circuits may also generate audio noise. If this is
the case, try replacing them with a capacitor having a different
dielectric or construction, for example a lm type.
LinkSwitch-XT Layout Considerations
See Figure 6 for a recommended circuit board layout for
LinkSwitch-XT (P & G package).
Single Point Grounding
Use a single point ground connection from the input lter capacitor
to the area of copper connected to the SOURCE pins.
25-5
Rev. E 11/08

5 Page





LNK363 arduino
LNK362-364
S1
50 V
470 Ω
5W
D FB
BP
SS
SS
470 kΩ
0.1 μF
S2
50 V
Figure 8. LinkSwitch-XT General Test Circuit.
PI-3490-060204
t2
HV 90%
t1
90%
DRAIN
VOLTAGE
0V
10%
D = t1
t2
PI-2048-033001
Figure 9. LinkSwitch-XT Duty Cycle Measurement.
DCMAX
(internal signal)
tP
FB
VDRAIN
1
t=
P fOSC
tEN
Figure 10. LinkSwitch-XT Output Enable Timing.
PI-3707-112503
21-111
Rev. E 11/08

11 Page







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