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PDF AZ10LVEL16VS Data sheet ( Hoja de datos )
| Número de pieza | AZ10LVEL16VS | |
| Descripción | ECL/PECL Differential Receiver | |
| Fabricantes | Arizona Microtek | |
| Logotipo |  |
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ARIZONA MICROTEK, INC.
AZ10LVEL16VS
AZ100LVEL16VS
ECL/PECL Differential Receiver with Variable Output Swing
FEATURES
• 250ps Propagation Delay
• High Bandwidth Output Transitions
• Operating Range of 3.0V to 5.5V
• Internal Input Pulldown Resistors
• Functionally Equivalent to ON
Semiconductor MC10EL16,
MC100EL16 & MC100LVEL16
• Variable Output Swing
DESCRIPTION
PACKAGE AVAILABILITY
PACKAGE PART NUMBER MARKING NOTES
SOIC 8
AZ10LVEL16VSD
AZM10
LV16VS
1,2
SOIC 8
AZ100LVEL16VSD
AZM100
LV16VS
1,2
TSSOP 8
AZ10LVEL16VST
AZT
L16VS
1,2
TSSOP 8
AZ100LVEL16VST
AZH
L16VS
1,2
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
2 Date code format: “Y” or “YY” for year followed by “WW” for week on
underside of part.
The AZ10/100LVEL16VS is a
differential receiver with variable output swing. The LVEL16VS has functionality and output transition times
similar to the EL16, with an input that controls the amplitude of the Q/Q¯ outputs.
The operational range of the LVEL16VS control input, VCTRL, is from VBB (full swing) to VCC (min. swing).
Maximum swing is achieved by leaving the VCTRL pin open or by tying it to the negative supply (VEE). Simple
control of the output swing can be obtained by a variable resistor between the VBB and VCC pins, with the wiper
driving VCTRL. Typical application circuits and results are described in this Data Sheet.
The LVEL16VS provides a VBB output for single-ended use or a DC bias reference for AC coupling to the
device. For single-ended input applications, the VBB reference should be connected to one side of the D/D¯
differential input pair. The input signal is then fed to the other D/D¯ input. The VBB pin can support 1.5mA
sink/source current. When used, the VBB pin should be bypassed to ground via a 0.01μF capacitor.
Under open input conditions internal input clamps will force the Q output LOW.
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.
PIN DESCRIPTION
PIN
D, D¯
VCTRL
Q, Q¯
VBB
VCC
VEE
FUNCTION
Data Inputs
Output Swing Control
Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
VCTRL 1
D2
D3
8 VCC
7Q
6Q
VBB 4
5 VEE
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541
www.azmicrotek.com
1 page  
AZ10LVEL16VS
AZ100LVEL16VS
Typical Voltage Output Swing at +25C, VCC Nom (see Figure 1 and
Figure 2)
100
1.500 V (100K ECL)
75
50
%OUT
Vbb
100K ECL
25
0
0.0
0.4
0.8
1.2 Vbb
1.6
VCTRL (V)
1.320
Figure 1: Voltage Source Implementation
VCTRL
VCTRL 1
8 V CC
D2
D3
VBB 4
7Q
6Q
5 VEE
Figure 2: Alternative Implementation
V SWING
(pk-pk)
50 50
-2V
10k
VCTRL 1
8 V CC
D2
D3
VBB 4
7Q
6Q
5 VEE
VSWING
(pk-pk)
RL RL
RL = [email protected] Supply; RL = [email protected] Supply
November 2006 * REV - 2
www.azmicrotek.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet AZ10LVEL16VS.PDF ] | |
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