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PDF 5895 Data sheet ( Hoja de datos )

Número de pieza 5895
Descripción LATCHED SOURCE DRIVERS
Fabricantes Allegro MicroSystems 
Logotipo Allegro MicroSystems Logotipo



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5895
8-BIT SERIAL-INPUT,
LATCHED DRIVERS
5895
UCN5895A
GROUND 1
CLOCK 2 CLK
SERIAL 3
DATA IN
SHIFT
REGISTER
STROBE 4 ST LATCHES
16
VDD 15
OE 14
VBB 13
SERIAL
DATA OUT
LOGIC
SUPPLY
OUTPUT
ENABLE
LOAD
SUPPLY
OUT1 5
12 OUT 8
OUT 2 6
11 OUT7
OUT3 7
10 OUT6
OUT 4 8
9 OUT5
Dwg. PP-026-2A
Note the UCN5895A (DIP) and the A5895SLW
(SOIC) are electrically identical and share a common
terminal number assignment.
ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Output Voltage, VOUT . . . . . . . . . . . . . . 50 V
Logic Supply Voltage Range,
VDD . . . . . . . . . . . . . . . . . . 4.5 V to 12 V
Driver Supply Voltage Range,
VBB . . . . . . . . . . . . . . . . . . 5.0 V to 50 V
Input Voltage Range,
VIN . . . . . . . . . . . -0.3 V to VDD + 0.3 V
Continuous Output Current,
IOUT . . . . . . . . . . . . . . . . . . . . . -250 mA
Allowable Package Power Dissipation,
PD . . . . . . . . . . . . . . . . . . . . See Graph
Operating Temperature Range,
TA . . . . . . . . . . . . . . . . . -20°C to +85°C
Storage Temperature Range,
TS . . . . . . . . . . . . . . . . -55°C to +150°C
Caution: CMOS devices have input-static
protection, but are susceptible to damage when
exposed to extremely high static electrical
charges.
BiMOS II 8-BIT SERIAL INPUT,
LATCHED SOURCE DRIVERS
The UCN5895A, UCN5895EP, and A5895SLW BiMOS II serial-
input, latched source drivers are designed for applications emphasiz-
ing low output saturation voltages and currents to -250 mA per output.
These smart high-side octal, driver ICs merge an 8-bit CMOS shift
register, associated CMOS latches, and CMOS control logic (strobe
and output enable) with medium current emitter-follower (sourcing)
outputs. Typical applications include incandescent or LED displays
(both directly driven and multiplexed), non-impact (i.e., thermal)
printers, relays, and solenoids.
Each device is suitable for high-side applications to -250 mA per
channel. The maximum supply voltage is 50 V and a minimum output
sustaining voltage rating of 35 V for inductive load applications. Under
normal operating conditions, the UCN5895A and UCN5895EP are
capable of providing -120 mA (8 outputs continuous and simultaneous)
at +65°C with a logic supply of 5 V. Similar devices, with higher output
current ratings, are the UCN5890A and UCN5891A.
BiMOS II devices can operate at greatly improved data-input rates.
With a 5 V supply, they will typically operate at better than 5 MHz.
At 12 V, significantly higher speeds are obtained.
The CMOS inputs provide for minimum loading and are compatible
with standard CMOS, PMOS, and NMOS circuits. TTL or DTL circuits
may require the use of appropriate pull-up resistors to ensure a proper
input-logic high. A CMOS serial data output allows cascading these
devices in multiple drive-line applications required by many dot matrix,
alphanumeric, and bar graph displays.
These devices are rated for continuous operation over the tem-
perature range of -20°C to +85°C. Because of limitations on package
power dissipation, the simultaneous operation of all output drivers may
require a reduction in duty cycle. The UCN5895A is supplied in a
standard 16-pin dual in-line plastic package with a copper lead frame
for increased allowable package power dissipation. The UCN5895EP
is supplied in a 20-lead plastic leaded chip carrier for minimum area,
surface-mount applications. The A5895SLW is supplied in a 16-lead
wide-body plastic SOIC.
FEATURES
s Low Output-Saturation Voltage
s Source Outputs to 50 V
s Output Current to -250 mA
s To 3.3 MHz Data-lnput Rate
s Low-Power CMOS Logic & Latches
Always order by complete part number, e.g., UCN5895A .

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5895 pdf
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5895
8-BIT SERIAL-INPUT,
LATCHED DRIVERS
CLOCK
DATA IN
STROBE
TYPICAL APPLICATION
UCN5895A
+ 12 V
1 16
2
SHIFT
VDD 15
REGISTER
3 OE 14
4 LATCHES VBB 13
5 12
6 11
7 10
89
DATA OUT
FOR > 8 SEGMENTS
PER DIGIT
OUTPUT ENABLE
(ACTIVE LOW)
CLOCK
DATA IN
+ 12 V
DATA OUT
STROBE
OUTPUT
ENABLE
UCN5821A
1C
16
2 15
3 14
4 13
5 12
6 11
7 10
8 99
TO OTHER SEGMENTS
TO
OTHER
DIGITS
TRUTH TABLE
Dwg. No. B-1541
Serial
Shift Register Contents
Data Clock
Input Input I1 I2 I3 ... IN-1 IN
Serial
Data Strobe
Output Input
Latch Contents
I1 I2 I3 ... IN-1 IN
Output
Enable
Output Contents
I1 I2 I3 ... IN-1 IN
H
H R1 R2 ... RN-2 RN-1
RN-1
L
L R1 R2 ... RN-2 RN-1
RN-1
X
R1 R2 R3 ... RN-1 RN
RN
X X X ... X X
X
L R1 R2 R3 ... RN-1 RN
P1 P2 P3 ... PN-1 PN
PN
H P1 P2 P3 ... PN-1 PN
L
P1 P2 P3 ... PN-1 PN
X X X ... X X H L L L ... L L
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State

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