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PDF LMX9838 Data sheet ( Hoja de datos )
| Número de pieza | LMX9838 | |
| Descripción | Bluetooth Serial Port Module | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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1. LMX9838  Hay una vista previa y un enlace de descarga de LMX9838 (archivo pdf) en la parte inferior de esta página. Total 26 Páginas | ||
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PRELIMINARY
July 2007
LMX9838
Bluetooth® Serial Port Module
1.0 General Description
The National Semiconductor LMX9838 Bluetooth Serial Port
module is a fully integrated Bluetooth 2.0 baseband controller,
2.4 GHz radio, crystal, antenna, LDO and discreets; com-
bined to form a complete small form factor (10 mm x 17 mm
x 2.0 mm) Bluetooth node.
All hardware and firmware is included to provide a complete
solution from antenna through the complete lower and upper
layers of the Bluetooth stack, up to the application including
the Generic Access Profile (GAP), the Service Discovery Ap-
plication Profile (SDAP), and the Serial Port Profile (SPP).
The module includes a configurable service database to fulfil
service requests for additional profiles on the host. Moreover,
the LMX9838 is qualified as a Bluetooth endproduct, ready to
be used in the end application without additional testing and
license cost.
Based on National’s CompactRISC® 16-bit processor archi-
tecture and Digital Smart Radio technology, the LMX9838 is
optimized to handle the data and link management process-
ing requirements of a Bluetooth node.
The firmware supplied in the on-chip ROM memory offers a
complete Bluetooth (v2.0) stack including profiles and com-
mand interface. This firmware features point-to-point and
point-to-multipoint link management supporting data rates up
to the theoretical maximum over RFComm of 704 kbps. The
internal memory supports up to 7 active Bluetooth data links
and one active SCO link.
The on-chip Patch RAM provided for lowest cost and risk, al-
lows the flexibility of firmware upgrade.
The module is lead free and RoHS (Restriction of Hazardous
Substances) compliant. For more information on those quality
standards, please visit our green compliance website at
http://www.national.com/quality/green/
2.0 Features
■ Complete Bluetooth 2.0 Stack including
— Baseband and Link Manager
— Protocols: L2CAP, RFCOMM, SDP
— Profiles: GAP, SDAP, SPP
■ High Integration: Includes Antenna, crystal, EEPROM,
LDO
■ Supporting up to 7 active Bluetooth data links and 1 active
SCO link
■ Class 2 operation
■ UART Command/Data port speed up to 921.6kbits/s
■ Advanced Audio Interface for external PCM codec
■ Better than -80dBm input sensitivity
■ FCC certified: FCC ID: ED9LMX9838
■ IC certified: IC-1520A-LMX9838
■ CE Self certified
■ Bluetooth SIG QD ID: B012394
■ Compact Size: 10mm x 17mm x 2.0mm
3.0 Functional Block Diagram
Bluetooth® is a registered trademark of Bluetooth SIG, Inc. and is used under license by National Semiconductor Corporation.
CompactRISC® is a registered trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation 300279
30027913
www.national.com
1 page  
9.0 Application Diagrams
The following diagrams show two application examples for
LMX9838 implementations.
Figure 1 illustrates a cable replacement application, requiring
the physical UART interface to a data device like a sensor.
The LMX9838 just waits for an incoming link and forwards
data between the data device and the bluetooth link. PG6 acts
as active link indicator and is used to enable the data transfer
from the sensor. A 32.768khz crystal may be is used to reduce
power consumption while waiting for the incoming link.
Figure 2 shows an example for the connection to a host con-
troller, which can include a simple application to control the
LMX9838. The figure also includes the connection to a PCM
codec, in case the host controller application includes an au-
dio profile. Reset, OP4 and OP5 are controlled by the host for
full control of the LMX9838 status.
Please refer to Section 16.0 Application Notes for more de-
tailed descriptions for LMX9838 designs.
FIGURE 1. Example For A Cable Replacement Application
30027901
30027916
FIGURE 2. Example For Host Controller Based Application With Audio Support
5 www.national.com
5 Page 
12.3 RECEIVER BACK-END
The hard-limiters are followed by a two frequency discrimina-
tors. The I-frequency discriminator uses the 90× phase-shift-
ed signal from the Q-path, while the Q-discriminator uses the
90× phase-shifted signal from the I-path. A poly-phase band-
pass filter performs the required phase shifting. The output
signals of the I- and Q-discriminator are substracted and fil-
tered by a low-pass filter. An equalizer is added to improve
the eye-pattern for 101010 patterns.
After equalization, a dynamic AFC (automatic frequency off-
set compensation) circuit and slicer extract the RX_DATA
from the analog data pattern. It is expected that the Eb/No of
the demodulator is approximately 17 dB.
12.3.1 Frequency Discriminator
The frequency discriminator gets its input signals from the
limiter. A defined signal level (independent of the power sup-
ply voltage) is needed to obtain the input signal. Both inputs
of the frequency discriminator have limiting circuits to opti-
mize performance. The bandpass filter in the frequency dis-
criminator is tuned by the autotuning circuitry.
12.3.2 Post-Detection Filter and Equalizer
The output signals of the FM discriminator first go through a
post-detection filter and then through an equalizer. Both the
post-detection filter and equalizer are tuned to the proper fre-
quency by the autotuning circuitry. The post-detection filter is
a low-pass filter intended to suppress all remaining spurious
signals, such as the second harmonic (4 MHz) from the FM
detector and noise generated after the limiter.
The post-detection filter also helps for attenuating the first
adjacent channel signal. The equalizer improves the eye-
opening for 101010 patterns. The post-detection filter is a
third order Butterworth filter.
12.4 AUTOTUNING CIRCUITRY
The autotuning circuitry is used for tuning the bandpass filter,
the detector, the post-detection filter, the equalizer, and the
transmit filters for process and temperature variations. The
circuit also includes an offset compensation for the FM de-
tector.
12.5.1 Phase-Frequency Detector
The phase-frequency detector is a 5-state phase-detector. It
responds only to transitions, hence phase-error is indepen-
dent of input waveform duty cycle or amplitude variations.
Loop lockup occurs when all the negative transitions on the
inputs, F_REF and F_MOD, coincide. Both outputs (i.e., Up
and Down) then remain high. This is equal to the zero error
mode. The phase-frequency detector input frequency range
operates at 12 MHz.
12.6 TRANSMITTER CIRCUITRY
The transmitter consists of ROM tables, two Digital to Analog
(DA) converters, two low-pass filters, IQ mixers, and a power
amplifier (PA).
The ROM tables generate a digital IQ signal based on the
transmit data. The output of the ROM tables is inserted into
IQ-DA converters and filtered through two low-pass filters.
The two signal components are mixed up to 2.5 GHz by the
TX mixers and added together before being inserted into the
transmit PA.
12.6.1 IQ-DA Converters and TX Mixers
The ROM output signals drive an I- and a Q-DA converter.
Two Butterworth low-pass filters filter the DA output signals.
The 6 MHz clock for the DA converters and the logic circuitry
around the ROM tables are derived from the autotuner.
The TX mixers mix the balanced I- and Q-signals up to 2.4-2.5
GHz. The output signals of the I- and Q-mixers are summed.
12.7 32 kHz Oscillator
An oscillator is provided (see Figure 3) that is tuned to provide
optimum performance and low-power consumption while op-
erating with a 32.768 kHz crystal. An external crystal clock
network is required between the 32k+ clock input (pad 27) and
the 32k- clock output (pad 28) signals.The oscillator is built in
a Pierce configuration and uses two external capacitors. Ta-
ble 13 provides the oscillator’s specifications.
In case the 32kHz is not used, it is recommended to leave
32k- open and connect 32k+ to GND.
12.5 SYNTHESIZER
The synthesizer consists of a phase-frequency detector, a
charge pump, a low-pass loop filter, a programmable fre-
quency divider, a voltage-controlled oscillator (VCO), a delta-
sigma modulator, and a lookup table.
The frequency divider consists of a divide-by-2 circuit (divides
the 5 GHz signal from the VCO down to 2.5 GHz), a divide-
by-8-or-9 divider, and a digital modulus control. The delta-
sigma modulator controls the division ratio and also gener-
ates an input channel value to the lookup table.
30027903
FIGURE 3. 32.768 kHz Oscillator
TABLE 13. 32.768 kHz Oscillator Specifications
Symbol
VDD
IDDACT
f
VPPOSC
Parameter
Supply Voltage
Supply Current (Active)
Nominal Output Frequency
Oscillating Amplitude
Duty Cycle
Condition
Min Typ Max
1.62 1.8 1.98
2
32.768
1.8
40 - 60
Unit
V
µA
kHz
V
%
11 www.national.com
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet LMX9838.PDF ] | |
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