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PDF AD9747 Data sheet ( Hoja de datos )
| Número de pieza | AD9747 | |
| Descripción | Digital-to-Analog Converters | |
| Fabricantes | Analog Devices | |
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Data Sheet
Dual, 10-/12-/14-/16-Bit, 250 MSPS,
Digital-to-Analog Converters
AD9743/AD9745/AD9746/AD9747
FEATURES
High dynamic range, dual digital-to-analog converters (DACs)
Low noise and intermodulation distortion
Single carrier W-CDMA ACLR = 80 dBc at 61.44 MHz
intermediate frequency (IF)
Innovative switching output stage permits useable outputs
beyond Nyquist frequency
LVCMOS inputs with dual-port or optional interleaved
single-port operation
Differential analog current outputs are programmable from
8.6 mA to 31.7 mA full-scale
Auxiliary 10-bit current DACs with source/sink capability for
external offset nulling
Internal 1.2 V precision reference voltage source
Operates from 1.8 V and 3.3 V supplies
315 mW power dissipation
Small footprint, RoHS-compliant, 72-lead LFCSP
APPLICATIONS
Wireless infrastructure
W-CDMA, CDMA2000, TD-SCDMA, WiMAX
Wideband communications: LMDS/MMDS, point-to-point
Instrumentation
Radio frequency (RF) signal generators, arbitrary
waveform generators
GENERAL DESCRIPTION
The AD9743/AD9745/AD9746/AD9747 are pin-compatible,
high dynamic range, dual DACs with 10-/12-/ 14-/16-bit
resolutions and sample rates of up to 250 MSPS. The devices
include specific features for direct conversion transmit applications,
including gain and offset compensation, and they interface
seamlessly with analog quadrature modulators, such as the
ADL5370.
A proprietary, dynamic output architecture permits synthesis of
analog outputs even above Nyquist by shifting energy away from
the fundamental and into the image frequency.
A serial peripheral interface (SPI) port provides full
programmability. In addition, some pin-programmable features
are offered for those applications without a controller.
PRODUCT HIGHLIGHTS
1. Low noise and intermodulation distortion (IMD) enables
high quality synthesis of wideband signals.
2. Proprietary switching output for enhanced dynamic
performance.
3. Programmable current outputs and dual auxiliary DACs
provide flexibility and system enhancements.
FUNCTIONAL BLOCK DIAGRAM
CLKP
CLKN
PID<15:0>
CMOS
INTERFACE
INTERFACE LOGIC
10
P2D<15:0>
SERIAL
PERIPHERAL
INTERFACE
INTERNAL
REFERENCE
AND
BIAS
GAIN
DAC
GAIN
DAC
OFFSET
DAC
OFFSET
DAC
16-BIT
DAC1
16-BIT
DAC2
IOUT1P
IOUT1N
IOUT2P
IOUT2N
AUX1P
AUX1N
AUX2P
AUX2N
Figure 1.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
AD9743/AD9745/AD9746/AD9747
AC SPECIFICATIONS
TMIN to TMAX, AVDD33 = 3.3 V, DVDD33 = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, IFS = 20 mA, full-scale digital input, maximum
sample rate, unless otherwise noted.
Table 3. AD9743 and AD9745
Parameter
SPURIOUS FREE DYNAMIC RANGE (SFDR)
fDAC = 250 MSPS, fOUT = 20 MHz
fDAC = 250 MSPS, fOUT = 70 MHz
fDAC = 250 MSPS, fOUT = 180 MHz1
INTERMODULATION DISTORTION (IMD)
fDAC = 250 MSPS, fOUT = 20 MHz
fDAC = 250 MSPS, fOUT = 70 MHz
fDAC = 250 MSPS, fOUT = 180 MHz1
CROSSTALK
fDAC = 250 MSPS, fOUT = 20 MHz
fDAC = 250 MSPS, fOUT = 70 MHz
fDAC = 250 MSPS, fOUT = 180 MHz1
ADJACENT CHANNEL LEAKAGE RATIO (ACLR) SINGLE CARRIER W-CDMA
fDAC = 245.76 MSPS, fOUT = 15.36 MHz
fDAC = 245.76 MSPS, fOUT = 61.44 MHz
fDAC = 245.76 MSPS, fOUT = 184.32 MHz1
NOISE SPECTRAL DENSITY (NSD)
fDAC = 245.76 MSPS, fOUT = 15.36 MHz
fDAC = 245.76 MSPS, fOUT = 61.44 MHz
fDAC = 245.76 MSPS, fOUT = 184.32 MHz1
AD9743
AD9745
Min Typ Max Min Typ Max Unit
80 82 dBc
70 70 dBc
64 66 dBc
80 86 dBc
80 80 dBc
72 74 dBc
80 80 dBc
80 80 dBc
80 80 dBc
66 76 dBc
66 76 dBc
64 72 dBc
−144
−144
−147
−155
−155
−155
dBm/Hz
dBm/Hz
dBm/Hz
1 Mix mode.
Rev. B | Page 5 of 30
5 Page 
Data Sheet
AD9743/AD9745/AD9746/AD9747
CVDD18 1
CVSS 2
CLKP 3
CLKN 4
CVSS 5
CVDD18 6
DVSS 7
DVDD18 8
P1D11 9
P1D10 10
P1D9 11
P1D8 12
P1D7 13
P1D6 14
P1D5 15
P1D4 16
P1D3 17
P1D2 18
PIN 1
INDICATOR
AD9745
TOP VIEW
(Not to Scale)
54 FSADJ
53 RESET
52 CSB
51 SCLK
50 SDIO
49 SDO
48 DVSS
47 DVDD18
46 DNC
45 DNC
44 DNC
43 DNC
42 P2D0
41 P2D1
40 P2D2
39 P2D3
38 P2D4
37 P2D5
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THESE PINS.
2. THE EXPOSED THERMAL PAD MUST BE SOLDERED TO COPPER
POUR ON TOP SURFACE OF PCB FOR MECHANICAL STABILITY AND
MUST BE ELECTRICALLY TIED TO LOW IMPEDANCE GND PLANE FOR
LOW NOISE PERFORMANCE.
Figure 3. AD9745 Pin Configuration
Table 9. AD9745 Pin Function Descriptions
Pin No. Mnemonic
1, 6 CVDD18
2, 5 CVSS
3 CLKP
4 CLKN
7, 28, 48 DVSS
8, 47 DVDD18
9 to 20
P1D11, P1D10, P1D9, P1D8, P1D7,
P1D6, P1D5, P1D4, P1D3, P1D2,
P1D1, P1D0
21 to 24,
26, 30, 43
to 46
DNC
25 DCO
27 DVDD33
29 IQSEL
31 to 42
P2D11, P2D10, P2D9, P2D8, P2D7,
P2D6, P2D5, P2D4, P2D3, P2D2,
P2D1, P2D0
49 SDO
50 SDIO
51 SCLK
52 CSB
53 RESET
54 FSADJ
55 REFIO
56, 57, 71, AVDD33
72
58, 61, 64, AVSS
67, 70
Description
Clock Supply Voltage (1.8 V).
Clock Supply Common (0 V).
Differential DAC Clock Input.
Complementary Differential DAC Clock Input.
Digital Supply Common (0 V).
Digital Core Supply Voltage (1.8 V).
Port 1 Data Bit Inputs.
Do Not Connect. Do not connect to these pins.
Data Clock Output. Use to clock data source.
Digital Input/Output Supply Voltage (3.3 V).
I/Q Framing Signal for Single-Port Mode Operation.
Port 2 Data Bit Inputs.
Serial Peripheral Interface Data Output.
Serial Peripheral Interface Data Input and Optional Data Output.
Serial Peripheral Interface Clock Input.
Serial Peripheral Interface Chip Select Input. Active low.
Hardware Reset. Active high.
Full-Scale Current Output Adjust. Connect 10 kΩ resistor to AVSS.
Reference Input/Output. Connect a 0.1 μF capacitor to AVSS.
Analog Supply Voltage (3.3 V).
Analog Supply Common (0 V).
Rev. B | Page 11 of 30
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD9747.PDF ] | |
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