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PDF CEB06N5 Data sheet ( Hoja de datos )

Número de pieza CEB06N5
Descripción N-Channel Logic Level Enhancement Mode Field Effect Transistor
Fabricantes CET 
Logotipo CET Logotipo



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No Preview Available ! CEB06N5 Hoja de datos, Descripción, Manual

CEP06N5/CEB06N5
Oct. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor 44
FEATURES
500V , 6.6A , RDS(ON)=1@VGS=10V.
Super high dense cell design for extremely low RDS(ON).
High power and current handling capability.
TO-220 & TO-263 package.
D
G
D
GS
CEB SERIES
TO-263(DD-PAK)
G
D
S
CEP SERIES
TO-220
S
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Drain Current-Continuous
-Pulsed
ID
IDM
Drain-Source Diode Forward Current
IS
Maximum Power Dissipation @Tc=25 C
Derate above 25 C
Operating and Storage Temperautre Range
PD
TJ, TSTG
Limit
500
Ć30
6.6
20
6.6
104
0.83
-55 to 150
Unit
V
V
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
RįJC
RįJA
4-17
1.2
62.5
C/W
C/W

1 page




CEB06N5 pdf
CEP06N5/CEB06N5
15
VDS=400V
12 ID=6A
9
6
3
0
0 20 40 60 80
Qg, Total Gate Charge (nC)
Figure 9. Gate Charge
VDD
RL
VIN
D VOUT
VGS
RGEN G
S
Figure 11. Switching Test Circuit
101
100ij
s
100
TC=25 C
Tj=150 C
-1 Single Pulse
10
100
101 102
103
VDS, Drain-Source Voltage (V)
Figure 10. Maximum Safe
Operating Area
td(on)
VOUT
t on
tr
td(off)
90%
10% INVERTED
toff
tf
90%
10%
VIN
10%
50%
90%
50%
PULSE WIDTH
Figure 12. Switching Waveforms
44
100
D=0.5
0.2
10-1
0.1
0.05
0.02
0.01
Single Pulse
10-2
10-5
10-4
10-3 10-2 10-1
Square Wave Pulse Duration (sec)
PDM
t1
t2
1. RįJC (t)=r (t) * RįJC
2. RįJC=See Datasheet
3. TJM-TC = P* RįJC (t)
4. Duty Cycle, D=t1/t2
100
Figure 13. Normalized Thermal Transient Impedance Curve
101
4-21

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