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Número de pieza | AAT1147 | |
Descripción | Step-Down Converter | |
Fabricantes | AAT | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de AAT1147 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
No Preview Available ! AAT1147
High Efficiency, Low Noise, Fast Transient
400mA Step-Down Converter
General Description
Features
SwitchReg™
The AAT1147 SwitchReg is a member of
AnalogicTech's Total Power Management IC™
(TPMIC™) product family. It is a fixed frequency
1.4MHz step-down converter with an input volt-
age range of 2.7V to 5.5V and output voltage as
low as 0.6V.
The AAT1147 is optimized for low noise portable
applications, reacts quickly to load variations, and
reaches peak efficiency at heavy load.
The AAT1147 output voltage is programmable with
external feedback resistors. It can deliver 400mA
of load current while maintaining high power effi-
ciency. The 1.4MHz switching frequency mini-
mizes the size of external components while keep-
ing switching losses low.
• VIN Range: 2.7V to 5.5V
• VOUT Adjustable from 0.6V to VIN
• 400mA Output Current
• Up to 98% Efficiency
• Low Noise, 1.4MHz Fixed Frequency PWM
Operation
• Fast Load Transient
• 150µs Soft Start
• Over-Temperature and Current Limit
Protection
• 100% Duty Cycle Low Dropout Operation
• <1µA Shutdown Current
• 8-Pin SC70JW Package
• Temperature Range: -40°C to +85°C
The AAT1147 is available in a Pb-free, space-sav-
ing 2.0x2.1mm SC70JW-8 package and is rated
Applications
over the -40°C to +85°C temperature range.
• Cellular Phones
• Digital Cameras
•www.DataSheet4U.com Handheld Instruments
• Microprocessor/DSP Core /IO Power
• PDAs and Handheld Computers
• USB devices
Typical Application
VIN
C2
4.7μF
U1
AAT1147
3 VIN
LX 4
1 EN
OUT 2
5 AGND PGND 7
8 PGND PGND 6
VO = 1.8V
L1
4.7μH R1
118k
R2
59k
C1
4.7μF
1147.2006.05.1.0
1
1 page Typical Characteristics
Efficiency vs. Load
(VOUT = 3.3V; L = 6.8µH)
100
VIN = 3.6V
80
60
VIN = 4.2V
40
VIN = 5.0V
20
0
1 10 100
Output Current (mA)
AAT1147
High Efficiency, Low Noise, Fast Transient
400mA Step-Down Converter
DC Regulation
(VOUT = 3.3V)
2.0
1.5
1.0
0.5 VIN = 4.2V
0.0
-0.5 VIN = 3.6V
-1.0 VIN = 5.0V
-1.5
1000
-2.0
0.1
1
10 100 1000
Output Current (mA)
Efficiency vs. Load
(VOUT = 2.5V; L = 6.8µH)
100
80 VIN = 3.6V
60
40 VIN = 4.2V
VIN = 5.0V
20
0
1 10 100 1000
Output Current (mA)
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
0.1
DC Regulation
(VOUT = 2.5V)
VIN = 4.2V
VIN = 5.0V
VIN = 3.6V
1 10 100
Output Current (mA)
1000
Efficiency vs. Load
(VOUT = 1.8V; L = 4.7µH)
DC Regulation
(VOUT = 1.8V)
100 2.0
80 VIN = 3.0V
60
VIN = 3.6V
40 VIN = 4.2V
20
1.5
1.0
VIN = 4.2V
0.5
0.0
-0.5 VIN = 3.6V
-1.0 VIN = 3.0V
-1.5
0 -2.0
1 10 100 1000
0.1 1
10 100 1000
Output Current (mA)
Output Current (mA)
1147.2006.05.1.0
5
5 Page AAT1147
High Efficiency, Low Noise, Fast Transient
400mA Step-Down Converter
The maximum input capacitor RMS current is:
IRMS = IO ·
VO · ⎛1 - VO ⎞
VIN ⎝ VIN ⎠
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current.
VO · ⎛1 - VO ⎞ = D · (1 - D) = 0.52 = 1
VIN ⎝ VIN ⎠
2
for VIN = 2 · VO
I =RMS(MAX)
IO
2
The term
VO · ⎛1 - VO ⎞
VIN ⎝ VIN ⎠
appears in both the input
voltage ripple and input capacitor RMS current
equations and is a maximum when VO is twice VIN.
This is why the input voltage ripple and the input
capacitor RMS current ripple are a maximum at
50% duty cycle.
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the
AAT1147. Low ESR/ESL X7R and X5R ceramic
capacitors are ideal for this function. To minimize
stray inductance, the capacitor should be placed as
closely as possible to the IC. This keeps the high
frequency content of the input current localized,
minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C2)
can be seen in the evaluation board layout in
Figure 2.
A laboratory test set-up typically consists of two
long wires running from the bench power supply to
the evaluation board input voltage pins. The induc-
tance of these wires, along with the low-ESR
ceramic input capacitor, can create a high Q net-
work that may affect converter performance. This
problem often becomes apparent in the form of
excessive ringing in the output voltage during load
transients. Errors in the loop phase and gain meas-
urements can also result.
1147.2006.05.1.0
Since the inductance of a short PCB trace feeding
the input voltage is significantly lower than the
power leads from the bench power supply, most
applications do not exhibit this problem.
In applications where the input power source lead
inductance cannot be reduced to a level that does
not affect the converter performance, a high ESR
tantalum or aluminum electrolytic should be placed
in parallel with the low ESR, ESL bypass ceramic.
This dampens the high Q network and stabilizes
the system.
Output Capacitor
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
4.7µF to 10µF X5R or X7R ceramic capacitor typi-
cally provides sufficient bulk capacitance to stabi-
lize the output during large load transitions and has
the ESR and ESL characteristics necessary for low
output ripple.
The output voltage droop due to a load transient is
dominated by the capacitance of the ceramic out-
put capacitor. During a step increase in load cur-
rent, the ceramic output capacitor alone supplies
the load current until the loop responds. Within two
or three switching cycles, the loop responds and
the inductor current increases to match the load
current demand. The relationship of the output volt-
age droop during the three switching cycles to the
output capacitance can be estimated by:
COUT
=
3 · ΔILOAD
VDROOP · FS
Once the average inductor current increases to the
DC load level, the output voltage recovers. The
above equation establishes a limit on the minimum
value for the output capacitor with respect to load
transients.
The internal voltage loop compensation also limits
the minimum output capacitor value to 4.7µF. This
is due to its effect on the loop crossover frequency
(bandwidth), phase margin, and gain margin.
Increased output capacitance will reduce the
crossover frequency with greater phase margin.
11
11 Page |
Páginas | Total 19 Páginas | |
PDF Descargar | [ Datasheet AAT1147.PDF ] |
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