|
|
PDF A3950 Data sheet ( Hoja de datos )
| Número de pieza | A3950 | |
| Descripción | DMOS Full-Bridge Motor Driver | |
| Fabricantes | Allegro MicroSystems | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de A3950 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
|
No Preview Available !
A3950
DMOS Full-Bridge Motor Driver
Features and Benefits
▪ Low RDS(on) outputs
▪ Overcurrent protection
▪ Motor lead short-to-supply protection
▪ Short-to-ground protection
▪ Sleep function
▪ Synchronous rectification
▪ Diagnostic output
▪ Internal undervoltage lockout (UVLO)
▪ Crossover-current protection
Packages:
Package LP, 16 pin TSSOP
with Exposed Thermal Pad
Package EU, 16 pin QFN
with Exposed Thermal Pad
Description
Designed for PWM (pulse width modulated) control of dc
motors, the A3950 is capable of peak output currents to ±2.8 A
and operating voltages to 36 V.
PHASE and ENABLE input terminals are provided for use in
controlling the speed and direction of a dc motor with externally
applied PWM control signals. Internal synchronous rectification
control circuitry is provided to lower power dissipation during
PWM operation.
Internal circuit protection includes motor lead short-to-
supply / short-to-ground, thermal shutdown with hysteresis,
undervoltage monitoring of VBB and VCP, and crossover-current
protection.
TheA3950 is supplied in a thin profile (<1.2 mm overall height)
16 pin TSSOP package (LP), and a very thin (0.75 mm nominal
height) QFN package. Both packages provide an exposed pad
for enhanced thermal dissipation, and are lead (Pb) free with
100% matte tin leadframe plating.
www.DataSheet4U.com
Approximate Scale 1:1
Typical Application Diagrams
VDD
5 kΩ
0.22 μF
25 V
VBB
0.1 μF
50 V
PHASE
GND
GND
SLEEP
ENABLE
A3950
EU Package
CP2
CP1
OUTB
0.1 μF
50 V
100 μF
50 V
0.1 μF
50 V
Package EU
VDD
5 kΩ
NFAULT
MODE
PHASE
GND
SLEEP
A3950
LP Package
ENABLE
OUTA
SENSE
NC
VREG
VCP
GND
CP2
CP1
OUTB
VBB
VBB
0.22 μF
25 V
0.1 μF
50 V
0.1 μF
50 V
100 μF
50 V
0.1 μF
50 V
Package LP
A3950DS, Rev. 4
1 page  
A3950
SLEEP
ENABLE
PHASE
MODE
VBB
VOUTA
0
VBB
VOUTB
0
DMOS Full-Bridge Motor Driver
Timing Diagram: PWM Control
IOUTX 0
A
1
2 34
5
15
VBB
OutA
3
24
OutB
OutA
A Charge pump and VREG power-on delay (≈200 μs)
6 789
VBB
6
7
OutB
8
9
Allegro MicroSystems, Inc.
5
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5 Page 
A3950
DMOS Full-Bridge Motor Driver
EU Package, 16 Pin QFN with Exposed Thermal Pad
All dimensions reference only, not for tooling use.
(reference JEDEC MO-220WGGC-4)
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
QFN65P400X400X80-17BM); adjust as necessary to meet
application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal
vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
4.15 .163
3.85 .152
16
1A
2
16X
0.08 [.003] C
16X
0.35
0.25
.014
.010
0.10 [.004] M C A B
0.05 [.002] M C
0.65 .026
1.15 .045
NOM
0.35 .014
NOM
16 0.65 .026
NOM
0.65 .026
0.45 .018
A
B
4.15 .163
3.85 .152
SEATING C
PLANE
0.80 .031
0.70 .028
0.20 .008
REF
0.05 .002
0.00 .000
4X0.20 .008
MIN
1
2
12X0.20 .008
MIN
2.15 .085
NOM
C
3.8 .150
NOM
3.8 .150
NOM
0.15R .006
REF
2
1
B
2.15 .085
NOM
2.15 .085
NOM
4X 0.20 .008
MIN
16
2.15 .085
NOM
Allegro MicroSystems, Inc.
11
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet A3950.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| A3950 | DMOS Full-Bridge Motor Driver | Allegro MicroSystems |
| A3951 | FULL-BRIDGE PWM MOTOR DRIVER | Allegro MicroSystems |
| A3951SB | FULL-BRIDGE PWM MOTOR DRIVER | Allegro MicroSystems |
| A3951SW | FULL-BRIDGE PWM MOTOR DRIVER | Allegro MicroSystems |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |