PDF 29F160BE Data sheet ( Hoja de datos )

Número de pieza	29F160BE
Descripción	16M (2M X 8/1M X 16) BIT
Fabricantes	Fujitsu Media Devices
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No Preview Available ! www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS05-20879-2E FLASH MEMORY CMOS 16M (2M × 8/1M × 16) BIT MBM29F160TE/BE-55/-70/-90 s GENERAL DESCRIPTION The MBM29F160TE/BE is a 16M-bit, 5.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each. The MBM29F160TE/BE is offered in a 48-pin TSOP (I) package. The device is designed to be programmed in-system with the standard system 5.0 V VCC supply. 12.0 V VPP is not required for write or erase operations. The device can also be reprogrammed in standard EPROM programmers. The standard MBM29F160TE/BE offers access times of 55 ns, 70 ns and 90 ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write enable (WE), and output enable (OE) controls. The MBM29F160TE/BE is pin and command set compatible with JEDEC standard E2PROMs. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0 V Flash or EPROM devices. s PRODUCT LINE UP (Continued) Part No. MBM29F160TE/160BE Ordering Part No. VCC = 5.0 V±5% VCC = 5.0 V±10% -55 — — -70 Max. Address Access Time (ns) 55 70 Max. CE Access Time (ns) 55 70 Max. OE Access Time (ns) 30 30 s PACKAGES 48-pin plastic TSOP (I) Marking Side — -90 90 90 40 (FPT-48P-M19) Marking Side (FPT-48P-M20) 1 page MBM29F160TE-55/-70/-90/MBM29F160BE-55/-70/-90 s BLOCK DIAGRAM VCC VSS WE BYTE RESET WP CE OE RY/BY Buffer RY/BY Erase Voltage Generator DQ0 to DQ15 Input/Output Buffer State Control Command Register Program Voltage Generator Chip Enable Output Enable Logic STB Data Latch A0 to A19 A-1 Y-Decoder STB Timer for Low VCC Detector Program/Erase Address Latch X-Decoder Y-Gating Cell Matrix 5 5 Page MBM29F160TE-55/-70/-90/MBM29F160BE-55/-70/-90 Table 4.1 MBM29F160TE/BE Sector Protection Verify Autoselect Code Type A12 to A19 A6 A1 A0 A-11 Manufacture’s Code X VIL VIL VIL VIL Device Code MBM29F160TE MBM29F160BE Byte Word Byte Word X X VIL VIL VIL VIH X VIL VIL VIL VIH X Sector Protection Sector Addresses VIL VIH VIL VIL 1: A-1 is for Byte mode. 2: Outputs 01H at protected sector addresses and outputs 00H at unprotected sector addresses. Code (HEX) 04H D2H 22D2H D8H 22D8H 01H2 Table 4.2 Expanded Autoselect Code Table Type Code DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 Manufacture’s Code 04H A-1/0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 (B) D2H A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z 1 1 0 1 0 0 1 0 MBM29F160TE Device (W) 22D2H 0 0 1 0 0 0 1 0 1 1 0 1 0 0 1 0 Code (B) D8H A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z 1 1 0 0 1 0 0 0 MBM29F160BE (W) 22D8H 0 0 1 0 0 0 1 0 1 1 0 0 1 0 0 0 Sector Protection 01H A-1/0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 (B): Byte mode (W): Word mode 11 11 Page

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