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What is A6850?

This electronic component, produced by the manufacturer "Allegro MicroSystems", performs the same function as "Dual Channel Switch Interface IC".


A6850 Datasheet PDF - Allegro MicroSystems

Part Number A6850
Description Dual Channel Switch Interface IC
Manufacturers Allegro MicroSystems 
Logo Allegro MicroSystems Logo 


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A6850
Dual Channel Switch Interface IC
Features and Benefits
▪ 4.75 to 26.5 V operation
▪ Low VIN-to-VOUT voltage drop
1/10 current sense feedback
▪ Survive short-to-battery and short-to-ground faults
▪ Survive 40 V load dump
▪ >4 kV ESD rating on the output pins, >2 kV on all other pins
▪ Output current limiting
▪ Low operating and Sleep mode currents
▪ Integrates with Allegro A114x and A118x Hall effect
two-wire sensors
Package: 8 pin SOIC (suffix L)
Description
The Allegro® A6850 is designed to interface between a
microprocessor and a pair of 2-wire Hall effect sensors.
The A6850 uses protected high-side low resistance DMOS
MOSFETs to switch the supply voltage to the two Hall effect
devices. Each switch can be controlled independently via
individual ENABLE pins and both switches are protected
with current-limiting circuitry. The output switches are rated
to operate to 26.5 V and will source at least 25 mA per channel
before current limiting.
Typical two-wire Hall sensor applications require the user
to measure the supply current to determine whether the Hall
sensor is switched on (magnetic field present) or switched off
(no magnetic field present). This is usually accomplished by
using an external series shunt resistor and protection circuits
for the microprocessor. In many systems, the sensed voltage is
used as the input to a microprocessor analog-to-digital (A-to-D)
input. This provides the system with an indication of the status
of the two-wire switch as well as provides the capability for
diagnostic information if there is an open or shorted sensor.
Approximate Scale 1:1
Continued on the next page…
ENABLE1
ENABLE2
Functional Block Diagram
VIN
Control
Block
SENSE1
×1/10 IOUTPUT1
Fault
Detection
OUTPUT1
6850-DS
SENSE2
×1/10 IOUTPUT2
Fault
Detection
GROUND
OUTPUT2

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A6850 equivalent
A6850
Dual Channel Switch Interface IC
Output Faults
The A6850 withstands short-to-ground or short-to-battery of
the OUTPUTx pins. In the case of short-to-ground, current is
held to the current limit (IOUTPUTM).
If VOUTPUTx > (VIN + 0.7 V) during short-to-battery, the
A6850 monitors VOUTPUTx and disables the outputs. Because
the protection circuitry requires a finite amount of time to
disable the outputs, a bypass capacitor of 1 µF is necessary
on VIN. Although OUTPUTx sinks current into the A6850 in
this state, the current is bled to ground and does not charge-
up capacitors tied to VIN.
Overvoltage Protection
The A6850 has built-in overvoltage protection against a load
dump on the supply bus. In the case of a load dump, or when
VIN is connected to the battery supply bus and VIN rises
above the overvoltage threshold, VOVP , the A6850 will shut
off the outputs.
limits on the sense pin (see Electrical Characteristics table).
Sleep Mode
Low-leakage or sleep modes are required in automotive
applications to minimize battery drain when the vehicle is
parked. The A6850 enters sleep mode when both ENABLE
pins are low. In sleep mode, the internal regulators and all
other internal circuitry are disabled.
When enabling an output, the part must first come out of
sleep mode. Consequently, the wake-up time amounts to
a propagation delay before the outputs turn on. Also, the
ENABLE pins do not switch with hysteresis until the regula-
tors stabilize.
After the internal regulators stabilize, internal circuitry is
enabled and the outputs turn on, as shown in figure 1. As
long as one ENABLE pin is held high, the A6850 operates
with hysteresis.
SENSE Pin Outputs
The A6850 divides the OUTPUTx pin current by 10 and
mirrors it onto the corresponding SENSEx pin. Putting sense
resistors, RSENSE , from these pins to ground will create
a voltage that can be read by an ADC (analog-to-digital
converter). The value of RSENSE should be chosen so that
the voltage drop across the sense resistor (VRSENSE) does not
exceed the maximum voltage rating of the ADC. For further
protection of the ADC, an external clamping circuit, such
as a Zener diode, can be used to clamp any transient current
spikes that may occur on the output that would be translated
onto the SENSE pins.
The sense current is one tenth of the output current, plus an
offset current. This offset current is consistent across the
whole range of the output current. The sense current can be
calculated by the following formula:
ISENSEx = (IOUTPUTx / 10) + ISENSE(ofs) .
(5)
The sense resistor must also be chosen to meet the voltage
ENABLE
VREG
VENABLEL
> tON
RegOk
OUTPUT
Figure 1. Activation Timing Diagram. Exiting Sleep mode
via ENABLE signal to output waveform.
Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com


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