C8051F344 Datasheet PDF - SilAbs
Part Number | C8051F344 | |
Description | Full Speed USB Flash MCU | |
Manufacturers | SilAbs | |
Logo | ||
There is a preview and C8051F344 download ( pdf file ) link at the bottom of this page. Total 30 Pages |
Preview 1 page No Preview Available ! C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Full Speed USB Flash MCU Family
Analog Peripherals
- 10-Bit ADC (C8051F340/1/2/3/4/5/6/7/A/B only)
• Up to 200 ksps
• Built-in analog multiplexer with single-ended and
differential mode
• VREF from external pin, internal reference, or VDD
• Built-in temperature sensor
• External conversion start input option
- Two comparators
- Internal voltage reference
(C8051F340/1/2/3/4/5/6/7/A/B only)
- Brown-out detector and POR Circuitry
USB Function Controller
- USB specification 2.0 compliant
- Full speed (12 Mbps) or low speed (1.5 Mbps) operation
- Integrated clock recovery; no external crystal required for
full speed or low speed
- Supports eight flexible endpoints
- 1 kB USB buffer memory
- Integrated transceiver; no external resistors required
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-intru-
sive in-system debug (No emulator required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Voltage Supply Input: 2.7 to 5.25 V
- Voltages from 3.6 to 5.25 V supported using On-Chip
Voltage Regulator
HIgh Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
Instructions in 1 or 2 system clocks
- 48 MIPS and 25 MIPS versions available.
- Expanded interrupt handler
Memory
- 4352 or 2304 Bytes RAM
- 64 or 32 kB Flash; In-system programmable in 512-byte
sectors
Digital Peripherals
- 40/25 Port I/O; All 5 V tolerant with high sink current
- Hardware enhanced SPI™, SMBus™, and one or two
enhanced UART serial ports
- Four general purpose 16-bit counter/timers
- 16-bit programmable counter array (PCA) with five cap-
ture/compare modules
- External Memory Interface (EMIF)
Clock Sources
- Internal Oscillator: ±0.25% accuracy with clock recovery
enabled. Supports all USB and UART modes
- External Oscillator: Crystal, RC, C, or clock (1 or 2 Pin
modes)
- Low Frequency (80 kHz) Internal Oscillator
- Can switch between clock sources on-the-fly
Packages
- 48-pin TQFP (C8051F340/1/4/5/8/C)
- 32-pin LQFP (C8051F342/3/6/7/9/A/B/D)
- 5x5 mm 32-pin QFN (C8051F342/3/6/7/9/A/B)
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
A 10-bit +
M
U
200 ksps
+
-
X ADC -
TEMP
SENSOR
VREF
VREG
C8051F340/1/2/34/5/6/7/A/B Only
PRECISION INTERNAL
OSCILLATORS
DIGITAL I/O
UART0
UART1*
SPI
SMBus
PCA
Port 0
Port 1
Port 2
4 Timers
Port 3
48 Pin Only
Port 4
* C8051F340/1/4/5/8/A/B/C Only
USB Controller /
Transceiver
HIGH-SPEED CONTROLLER CORE
64/32 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(48/25 MIPS)
DEBUG
CIRCUITRY
4/2 kB RAM
POR WDT
Rev. 1.4 9/09
Copyright © 2009 by Silicon Laboratories
C8051F34x
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C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
14.5.1.System Clock Selection ......................................................................... 139
14.5.2.USB Clock Selection .............................................................................. 139
15. Port Input/Output.................................................................................................. 142
15.1.Priority Crossbar Decoder .............................................................................. 144
15.2.Port I/O Initialization ....................................................................................... 147
15.3.General Purpose Port I/O ............................................................................... 150
16. Universal Serial Bus Controller (USB0).............................................................. 159
16.1.Endpoint Addressing ...................................................................................... 160
16.2.USB Transceiver ............................................................................................ 160
16.3.USB Register Access ..................................................................................... 162
16.4.USB Clock Configuration................................................................................ 166
16.5.FIFO Management ......................................................................................... 167
16.5.1.FIFO Split Mode ..................................................................................... 167
16.5.2.FIFO Double Buffering ........................................................................... 168
16.5.3.FIFO Access .......................................................................................... 168
16.6.Function Addressing....................................................................................... 169
16.7.Function Configuration and Control................................................................ 169
16.8.Interrupts ........................................................................................................ 172
16.9.The Serial Interface Engine ............................................................................ 176
16.10.Endpoint0 ..................................................................................................... 176
16.10.1.Endpoint0 SETUP Transactions .......................................................... 177
16.10.2.Endpoint0 IN Transactions................................................................... 177
16.10.3.Endpoint0 OUT Transactions............................................................... 178
16.11.Configuring Endpoints1-3 ............................................................................. 180
16.12.Controlling Endpoints1-3 IN.......................................................................... 180
16.12.1.Endpoints1-3 IN Interrupt or Bulk Mode............................................... 180
16.12.2.Endpoints1-3 IN Isochronous Mode..................................................... 181
16.13.Controlling Endpoints1-3 OUT...................................................................... 183
16.13.1.Endpoints1-3 OUT Interrupt or Bulk Mode........................................... 183
16.13.2.Endpoints1-3 OUT Isochronous Mode................................................. 184
17. SMBus ................................................................................................................... 188
17.1.Supporting Documents ................................................................................... 189
17.2.SMBus Configuration...................................................................................... 189
17.3.SMBus Operation ........................................................................................... 189
17.3.1.Arbitration............................................................................................... 190
17.3.2.Clock Low Extension.............................................................................. 191
17.3.3.SCL Low Timeout................................................................................... 191
17.3.4.SCL High (SMBus Free) Timeout .......................................................... 191
17.4.Using the SMBus............................................................................................ 191
17.4.1.SMBus Configuration Register............................................................... 192
17.4.2.SMB0CN Control Register ..................................................................... 195
17.4.3.Data Register ......................................................................................... 198
17.5.SMBus Transfer Modes.................................................................................. 198
17.5.1.Master Transmitter Mode ....................................................................... 198
17.5.2.Master Receiver Mode ........................................................................... 200
Rev. 1.3
5
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