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PDF ISL6327 Data sheet ( Hoja de datos )
| Número de pieza | ISL6327 | |
| Descripción | Enhanced 6-Phase PWM Controller | |
| Fabricantes | Intersil Corporation | |
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Data Sheet
June 5, 2006
ISL6327
FN9276.1
Enhanced 6-Phase PWM Controller with
8-Bit VID Code and Differential Inductor
DCR or Resistor Current Sensing
The ISL6327 controls microprocessor core voltage regulation
by driving up to 6 synchronous-rectified buck channels in
parallel. Multiphase buck converter architecture uses
interleaved timing to multiply channel ripple frequency and
reduce input and output ripple currents. Lower ripple results in
fewer components, lower component cost, reduced power
dissipation, and smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates. The ISL6327 utilizes Intersil’s
proprietary Active Pulse Positioning (APP) and Adaptive
Phase Alignment (APA) modulation scheme to achieve the
extremely fast transient response with fewer output
capacitors.
Today’s microprocessors require a tightly regulated output
voltage position versus load current (droop). The ISL6327
senses the output current continuously by utilizing patented
techniques to measure the voltage across the dedicated
current sense resistor or the DCR of the output inductor.
Current sensing provides the needed signals for precision
droop, channel-current balancing, and overcurrent
protection. A programmable integrated temperature
compensation function is implemented to effectively
compensate the temperature variation of the current sense
element. The current limit function provides the overcurrent
protection for the individual phase.
A unity gain, differential amplifier is provided for remote
voltage sensing. Any potential difference between remote
and local grounds can be completely eliminated using the
remote-sense amplifier. Eliminating ground differences
improves regulation and protection accuracy. The threshold-
sensitive enable input is available to accurately coordinate
the start up of the ISL6327 with any other voltage rail.
Dynamic-VID™ technology allows seamless on-the-fly VID
changes. The offset pin allows accurate voltage offset
settings that are independent of VID setting.
Features
• Proprietary Active Pulse Positioning and Adaptive Phase
Alignment Modulation Scheme
• Precision Multiphase Core Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.5% System Accuracy Over Life, Load, Line and
Temperature
- Adjustable Precision Reference-Voltage Offset
• Precision Resistor or DCR Current Sensing
- Accurate Load-Line Programming
- Accurate Channel-Current Balancing
- Differential Current Sense
• Microprocessor Voltage Identification Input
- Dynamic VID™ Technology
- 8-Bit VID Input with Selectable VR11 code and
Extended VR10 Code at 6.25mV Per Bit
- 0.5V to 1.600V Operation Range
• Thermal Monitoring
• Integrated Programmable Temperature Compensation
• Overcurrent Protection and Channel Current Limit
• Overvoltage Protection with OVP Output Indication
• 2, 3, 4, 5 or 6 Phase Operation
• Adjustable Switching Frequency up to 1MHz Per Phase
• Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
- QFN Near Chip Scale Package Footprint; Improves
PCB Efficiency, Thinner in Profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Ordering Information
PART
NUMBER
(Note)
PART
TEMP.
MARKING (°C)
PACKAGE PKG.
(Pb-Free) DWG. #
ISL6327CRZ ISL6327CRZ 0 to70 48 Ld 7x7 QFN L48.7x7
ISL6327IRZ ISL6327IRZ -40 to 85 48 Ld 7x7 QFN L48.7x7
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
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ISL6327
Typical Application - 6-Phase Buck Converter with DCR Sensing and Integrated TCOMP
+5V
VTT
VR_RDY
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
VRSEL
OVP
R IOUT
VR_FAN
VR_HOT
+5V
FB
IDROOP
VDIFF
COMP REF
DAC
VSEN
RGND
EN_VTT
VCC
GND
ISL6327
PWM6
ISEN6-
ISEN6+
PWM4
ISEN4-
ISEN4+
PWM2
ISEN2-
ISEN2+
IOUT
PWM1
ISEN1-
ISEN1+
PWM3
ISEN3-
ISEN3+
PWM5
ISEN5-
ISEN5+
TM EN_PWR
TCOMP OFS FS SS
+5V
ROFS RT
R SS
VIN
NTC
+5V
VCC
BOOT
UGATE
EN
PWM
GND
ISL6609
DRIVER
PHASE
LGATE
+5V
VCC
BOOT
UGATE
EN
PWM
GND
ISL6609
DRIVER
PHASE
LGATE
+5V
VCC
BOOT
UGATE
EN
PWM
GND
ISL6609
DRIVER
PHASE
LGATE
VIN
VIN
VIN
+5V
VCC
BOOT
UGATE
EN
PWM
GND
ISL6609
DRIVER
PHASE
LGATE
+5V
VCC
BOOT
UGATE
EN
PWM
GND
ISL6609
DRIVER
PHASE
LGATE
+5V
VCC
BOOT
UGATE
EN
PWM
GND
ISL6609
DRIVER
PHASE
LGATE
VIN
VIN
VIN
μP
LOAD
5 FN9276.1
June 5, 2006
5 Page 
www.DataSheet4U.com
ISL6327
pulse of the previous phase. The DC components of the
inductor currents combine to feed the load.
IL1 + IL2 + IL3, 7A/DIV
IL3, 7A/DIV
PWM3, 5V/DIV
IL2, 7A/DIV
IL1, 7A/DIV
PWM2, 5V/DIV
PWM1, 5V/DIV
1µs/DIV
FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS
FOR 3-PHASE CONVERTER
To understand the reduction of the ripple current amplitude in
the multiphase circuit, examine the equation representing an
individual channel’s peak-to-peak inductor current.
IPP =
(---V----I--N-----–-----V----O-----U----T---)----V----O----U-----T-
L fS VIN
(EQ. 1)
In Equation 1, VIN and VOUT are the input and the output
voltages respectively, L is the single-channel inductor value,
and fS is the switching frequency.
INPUT-CAPACITOR CURRENT 10A/DIV
CHANNEL 3
INPUT CURRENT
10A/DIV
CHANNEL 2
INPUT CURRENT
10A/DIV
CHANNEL 1
INPUT CURRENT
10A/DIV
1µs/DIV
FIGURE 2. CHANNEL INPUT CURRENTS AND INPUT-
CAPACITOR RMS CURRENT FOR 3-PHASE
CONVERTER
The output capacitors conduct the ripple component of the
inductor current. In the case of multiphase converters, the
capacitor current is the sum of the ripple currents from each
of the individual channels. Compare Equation 1 to the
expression for the peak-to-peak current after the summation
of N symmetrically phase-shifted inductor currents in
Equation 2. Peak-to-peak ripple current decreases by an
amount proportional to the number of channels. Output-
voltage ripple is a function of capacitance, capacitor
equivalent series resistance (ESR), and inductor ripple
current. Reducing the inductor ripple current allows the
designer to use fewer or less costly output capacitors.
IC, PP=
(---V----I--N-----–-----N------V----O-----U----T---)----V----O----U-----T-
L
fS
V
I
N
(EQ. 2)
Another benefit of interleaving is to reduce the input ripple
current. The input capacitance is determined in part by the
maximum input ripple current. Multiphase topologies can
improve the overall system cost and size by lowering the
input ripple current and allowing the designer to reduce the
cost of input capacitance. The example in Figure 2 illustrates
the input currents from a three-phase converter combining to
reduce the total input ripple current.
The converter depicted in Figure 2 delivers 36A to a 1.5V load
from a 12V input. The RMS input capacitor current is 5.9A.
Compare this to a single-phase converter also stepping down
12V to 1.5V at 36A. The single-phase converter has 11.9A
RMS input capacitor current. The single-phase converter
must use an input capacitor bank with twice the RMS current
capacity as the equivalent three-phase converter.
Figures 19, 20 and 21 in the section titled Input Capacitor
Selection can be used to determine the input-capacitor RMS
current based on the load current, the duty cycle, and the
number of channels. They are provided as aids in
determining the optimal input capacitor solution. Figure 22
shows the single phase input-capacitor RMS current for
comparison.
PWM Modulation Scheme
The ISL6327 adopts Intersil's proprietary Active Pulse
Positioning (APP) modulation scheme to improve the
transient performance. APP control is a unique dual-edge
PWM modulation scheme with both PWM leading and
trailing edges being independently moved to provide the
best response to the transient loads. The PWM frequency,
however, is constant and set by the external resistor
between the FS pin and GND.
To further improve the transient response, the ISL6327 also
implements Intersil's proprietary Adaptive Phase Alignment
(APA) technique. APA, with sufficiently large load step
currents, can turn on all phases together.
With both APP and APA control, ISL6327 can achieve
excellent transient performance and reduce the demand on
the output capacitors.
Under the steady state conditions the operation of the
ISL6327 PWM modulator appears to be that of a
conventional trailing edge modulator. Conventional analysis
and design methods can therefore be used for steady state
and small signal operation.
11 FN9276.1
June 5, 2006
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ISL6327.PDF ] | |
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