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PDF AD7766 Data sheet ( Hoja de datos )
| Número de pieza | AD7766 | |
| Descripción | 125ksps Analog to Digital Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Preliminary Technical Data
24-Bit, 10mW, 125ksps Analog to Digital
Converter in 16 lead TSSOP
AD7766
FEATURES
High performance 24-bit ADC
114dB SNR at 31.25 KHz output data rate
111dB SNR at 62.5 KHz output data rate
108dB SNR at 125 KHz output data rate
Max 20mW Power Consumption
10mW typ at 31.25 KHz output data rate
12mW typ at 62.5 KHz output data rate
15 mW typ at 125 KHz output data rate
High DC accuracy
24 Bits No Missing Codes (NMC)
Integral Non Linearity 15 ppm
Low temperature drift
Offset Drift ±25 nV/°C
On Chip Low pass FIR filter
Linear Phase Response
Passband Ripple: ±0.005dB
Stopband Attenuation: 100dB
2.5V Supply with 1.8V/2.5V/3V/3.6V logic interface
Flexible Interfacing options
Synchronization of multiple devices
Daisy Chain capability
Temp Range -40oC to 105oC
APPLICATIONS
Low-Power PCI/USB Data Acquisition Systems
Low-Power Wireless Acquisition Systems
Vibration Analysis
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
AVDD AGND
MCLK DVDD VDRIVE DGND
VREF+
VIN+
VIN-
CONVERTER
DIGITAL
FIR FILTER
REFGND
AD7766/
AD7766-1/
AD7766-2
SERIAL INTERFACE
&
CONTROL LOGIC
SCLK DRDY SDO SDI
Figure 1.
SYNC/PD
CS
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
PRODUCT OVERVIEW
The AD7766 is high performance 24-bit over-sampled analog to
digital converter combining wide dynamic range and input
bandwidth with an on chip FIR filter while consuming only
20mW max power in a 16 pin TSSOP package.
Specifically designed for ultra low power data acquisition,
providing 24-bit resolution and high SNR makes the device
ideal for measuring small signal changes over a wide dynamic
range. This is particularly important in many data acquisition
applications where small changes are measured on larger AC or
DC signals. In addition the AD7766 provides excellent DC
accuracy and drift specifications making the device suitable
where DC data also needs to be acquired. The AD7766
improves SNR performance and simplifies anti aliasing
requirements through over-sampling which is important in
minimizing input signal distortion to the inputs of the ADC. A
high performance on-chip FIR filter subsequently filters the
over-sampled data and removes out of band noise. A SYNC/PD
(Synchronisation/Power down) pin is an added feature,
allowing for easy synchronization of multiple devices. The
device operates from -40oC to 105oC.
By combining wide dynamic range and high SNR at output data
rates up to 125ksps with ultra low power the AD7766 provides a
compact solution for low power data acquisition such as PCI or
USB based systems.
RELATED DEVICES
Table 1. 24 bit Analog to Digital Converters
Part No
Speed Description
AD7760
AD7762/3
AD7764
AD7765
AD7767
2.5MSPs
625KSPs
312KSps
156KSPs
125KSPs
100dB Dynamic Range1
On-board Diff Amp & Ref Buffer
Parallel, Variable Decimation
109dB Dynamic Range1
On-Board Diff Amp & Ref buffer
Parallel/Serial, Variable Decimation
109dB Dynamic Range1
On-board Diff Amp & Ref Buffer
Serial, Variable Decimation (pin)
112dB Dynamic Range1
On-board Diff Amp & Ref Buffer
Serial,Variable Decimation (pin)
109dB Dynamic Range1
10mW power dissipation
Serial interface
1 Dynamic Range at max output data rate.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
TIMIMG DIAGRAMS
AD7766
MCLK
DRDY
t2
1
8*n 1
t3 t4
t1
tREAD
t5
8*n
t5
tDRDY
Figure 2.DRDY versus MCLK TimingDiagram. For AD7766 n=1(Decimate by8), AD7766-1 n=2(Decimate by 16), AD7766-2 n = 4(Decimate by 32).
DRDY
CS
SCLK
SDO
CS = 0
DRDY
SCLK
SDO
tDRDY
tREAD
t6
t13
t10
1
t8
t7
t11
t9
MSB
D22
D21
D20
23
D1 LSB
Figure 3.Serial timing diagram, reading data using CS
t12
DATA
INVALID
tDRDY
tREAD
t14
1
MSB
t8
D22
t10
t11
t9
D21 D20
23
D1
Figure 4.Serial timing diagram, reading data setting CS logic low.
24
LSB
t15
DATA
INVALID
Rev. PrD | Page 5 of 18
5 Page 
Preliminary Technical Data
TERMINOLOGY
Signal-to-Noise Ratio (SNR)
SNR is the ratio of the rms value of the actual input signal to the
ms sum of all other spectral components below the Nyquist
frequency, excluding harmonics and dc. The value for SNR is
expressed in decibels.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the fundamental.
For the AD7766, it is defined as
THD (dB) = 20 log
V22
+ V32
+ V42
+
V
2
5
+ V62
V1
where:
V1 is the rms amplitude of the fundamental.
V2, V3, V4, V5, and V6 are the rms amplitudes of the second to
the sixth harmonics.
Nonharmonic Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio of the rms signal amplitude to the rms value
of the peak spurious spectral component, excluding harmonics.
Dynamic Range
Dynamic range is the ratio of the rms value of the full scale to
the rms noise measured with the inputs shorted together. The
value for the dynamic range is expressed in decibels.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities creates distortion products
at sum and difference frequencies of mfa ± nfb, where m, n = 0,
1, 2, 3, and so on. Intermodulation distortion terms are those
for which neither m nor n are equal to 0. For example, the second-
order terms include (fa + fb) and (fa − fb), and the third-order
terms include (2fa + fb), (2fa − fb), (fa + 2fb), and (fa − 2fb).
The AD7766 is tested using the CCIF standard, where two input
frequencies near the top end of the input bandwidth are used.
In this case, the second-order terms are usually distanced in
frequency from the original sine waves, and the third-order
terms are usually at a frequency close to the input frequencies.
As a result, the second- and third-order terms are specified
separately. The calculation of the intermodulation distortion is
as per the THD specification, where it is the ratio of the rms
sum of the individual distortion products to the rms amplitude
of the sum of the fundamentals expressed in decibels.
AD7766
Integral Nonlinearity (INL)
INL is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function.
Differential Nonlinearity (DNL)
DNL is the difference between the measured and the ideal
1 LSB change between any two adjacent codes in the ADC.
Zero Error
Zero error is the difference between the ideal midscale input
voltage (when both inputs are shorted together) and the actual
voltage producing the midscale output code.
Zero Error Drift
Zero error drift is the change in the actual zero error value due
to a temperature change of 1°C. It is expressed as a percentage
of full scale at room temperature.
Gain Error
The first transition (from 100 … 000 to 100 … 001) should
occur for an analog voltage ½ LSB above the nominal negative
full scale. The last transition (from 011 … 110 to 011 … 111)
should occur for an analog voltage 1½ LSB below the nominal
full scale. The gain error is the deviation of the difference
between the actual level of the last transition and the actual
level of the first transition, from the difference between the
ideal levels.
Gain Error Drift
Gain error drift is the change in the actual gain error value due
to a temperature change of 1°C. It is expressed as a percentage
of full scale at room temperature.
Rev. PrD | Page 11 of 18
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet AD7766.PDF ] | |
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