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PDF NCP1601B Data sheet ( Hoja de datos )
| Número de pieza | NCP1601B | |
| Descripción | Compact Fixed Frequency Discontinuous or Critical Conduction Voltage Mode Power Factor Correction Controller | |
| Fabricantes | ON Semiconductor | |
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NCP1601A, NCP1601B
Compact Fixed Frequency
Discontinuous or Critical
Conduction Voltage Mode
Power Factor Correction
Controller
The NCP1601 is a controller designed for Power Factor Correction
(PFC) boost circuits. The device operates in fixed- frequency
Discontinuous Conduction Mode (DCM) and variable- frequency
Critical Conduction Mode (CRM) and takes advantages from both
operating modes. DCM limits the maximum switching frequency. It
simplifies the front- ended EMI filter design. CRM limits the
maximum currents of the boost stage diode, MOSFET and inductor.
It reduces the costs and improves the reliability of the circuit. This
device substantially exhibits unity power factor while operating in
DCM and CRM. The NCP1601 minimizes the required number of
external components. It incorporates high safety protection features
that make the NCP1601 suitable for robust and compact PFC stages.
Features
Near- Unity Power Factor in DCM or CRM
Voltage- Mode Operation
Low Startup and Shutdown Current Consumption
Programmable Switching Frequency for DCM
Synchronization Capability
Overvoltage Protection (107% of Nominal Output Level)
Undervoltage Protection or Shutdown
(8% of Nominal Output Level)
Programmable Overcurrent Protection
Thermal Shutdown with Hysteresis (95/140C)
Two VCC Undervoltage Lockout Hysteresis Options:
4.75 V for NCP1601A and 1.5 V for NCP1601B
These are Pb- Free Devices
Typical Applications
Electronic Light Ballast
AC Adapters
TV & Monitors
Mid- Power Applications
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MARKING
DIAGRAM
8
1
SOIC- 8
D SUFFIX
CASE 751
8
1601x
ALYW
G
1
8
1
PDIP- 8
N SUFFIX
CASE 626
8
NCP1601x
AWL
YYWWG
1
x
A
L, WL
Y, YY
W, WW
G
G
= A or B
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb--Free Package
= Pb--Free Package
PIN CONNECTIONS
FB 1
Vcontrol 2
Ramp 3
CS 4
8 VCC
7 Drv
6 GND
5 Osc
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
Semiconductor Components Industries, LLC, 2010
December, 2010 - Rev. 6
1
Publication Order Number:
NCP1601A/D
1 page  
NCP1601A, NCP1601B
ELECTRICAL CHARACTERISTICS (For typical values TJ = 25C. For min/max values, TJ = --40C to +125C, VCC = 15 V,
Vcontrol = 100 nF, Ramp = 100 pF, Osc = 220 pF unless otherwise specified)
Characteristic
Pin Symbol
Min
Typ
Max
OSCILLATOR
Oscillator Frequency (Osc = 220 pF to GND)
5 fosc
Internal Capacitance of the Oscillator Pin
Maximum Oscillator Switching Frequency
Oscillator Discharge Current (Osc = 5.5 V)
5 Cosc(int)
5 fosc(max)
5 Iodch
Oscillator Charge Current (Osc = 3 V)
5 Ioch
Comparator Lower Threshold (Osc = 220 pF to GND) (Note 3)
Comparator Upper Threshold (Osc = 220 pF to GND)
Synchronization Pulse Width for Detection
5 Vsync(L)
5 Vsync(H)
5 tsync(min)
Synchronization Propagation Delay
5 tsync(d)
GATE DRIVE
Gate Drive Resistor
Output High and Draw 100 mA out of Drv Pin (Isource = 100 mA)
Output Low and Insert 100 mA into Drv Pin (Isink = 100 mA)
7
ROH
ROL
Gate Drive Rise Time from 1.5 V to 13.5 V (Drv = 1 nF to GND)
7 tr
Gate Drive Fall Time from 13.5 V to 1.5 V (Drv = 1 nF to GND)
7 tf
FEEDBACK / OVERVOLTAGE PROTECTION / UNDERVOLTAGE PROTECTION
Reference Current
1 Iref
Regulation Block Ratio
1 IregL / Iref
Vcontrol Pin Internal Resistor
Maximum Control Voltage (IFB = 100 mA)
Feedback Pin Voltage (IFB = 100 mA)
2 Rcontrol
2 Vcontrol(max)
1 VFB1
Overvoltage Protection Current Ratio
Overvoltage Protection Current
Undervoltage Protection Current Ratio
1 IOVP / Iref
1 IOVP
1 IUVP / Iref
CURRENT SENSE
Current Sense Pin Offset Voltage (IS = 100 mA)
Overcurrent Protection Level
Current Sense Pin Offset Voltage at Overcurrent Level
4 VS
4 IS(OCP)
4 VS(OCP)
Zero Current Detection Level
4 IS(ZCD)
Current Sense Pin Offset Voltage at Zero Current Level
Zero Current Sense Resistor (RS(ZCD) = VS(ZCD) / IS(ZCD))
4 VS(ZCD)
4 RS(ZCD)
RAMP
Charging Current (Ramp = 0 V)
Maximum Power Resistance (Rpower = Vcontrol(max) / Ich)
Internal Clamping of Voltage Vton
3 Ich
3 Rpower
-- Vton(max)
Internal Capacitance of the Ramp Pin
3 Cramp(int)
Ramp Pin Sink Resistance (Osc = 0 V, Ramp = 1 mA sourcing)
3 Rramp
THERMAL SHUTDOWN
Thermal Shutdown Threshold (Note 4)
-- TSD
Thermal Shutdown Hysteresis
-- TH
2. Comparator lower threshold is also the synchronization threshold.
3. Guaranteed by design.
52
--
--
40
40
3.0
4.5
500
--
5
2
--
--
192
95
--
0.95
--
104
--
4
--
190
0
9
0
--
95
9.5
--
--
--
140
--
58
36
405
49
45
3.5
5
--
371
11.6
7.2
53
32
203
96
300
1.05
3
107
217
8
4
203
3.2
14
7.5
0.536
100
10.5
3.9
20
71.5
--
45
64
--
--
60
60
4.0
5.5
--
--
20
18
--
--
208
97
--
1.15
--
--
225
15
--
210
20
19
20
1
105
11.5
--
--
--
--
--
Unit
kHz
pF
kHz
mA
mA
V
V
ns
ns
Ω
Ω
ns
ns
mA
%
kΩ
V
V
%
mA
%
mV
mA
mV
mA
mV
kΩ
mA
kΩ
V
pF
Ω
C
C
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5
5 Page 
NCP1601A, NCP1601B
be too bulky because it can pollute the power factor by
distorting the rectified sinusoidal input voltage.
Iin
Vin
IL L
Vout
Cfilter
Cbulk
Power factor is corrected when the input impedance Zin
in (eq.3) are constant or slowly varying.
The MOSFET on time t1 or PFC modulation duty is
generated by a feedback signal Vton and a ramp. The PFC
modulation circuit and timing diagram are shown in
Figure 28. A relationship in (eq.4) is obtained.
t1
=
Cramp Vton
Ich
(eq.4)
Figure 26. DCM/CRM PFC Boost Converter
PFC Methodology
NCP1601 uses a proprietary PFC methodology
particularly designed for both DCM and CRM operation.
The PFC methodology is described in this section.
Inductor Current
Ipk
t1 t2 t3
T
time
Figure 27. Inductor Current in DCM
As shown in Figure 27, the inductor current IL of each
switching cycle starts from zero in DCM. CRM is a special
case of DCM when t3 = 0. When the PFC boost converter
MOSFET is on, the inductor current IL increases from zero
to Ipk for a time duration t1 with inductance L and input
voltage Vin. (eq.1) is formulated.
Vin
=
L
Ipk
t1
(eq.1)
The input filter capacitor Cfilter and the front- ended EMI
filter absorb the high- frequency component of inductor
current. It makes the input current Iin a low- frequency
signal.
Iin
=
Ipk
(t1 +
2T
t2)
for DCM (eq.2a)
Iin
=
Ipk
2
for CRM (eq.2b)
From (eq.1) and (eq.2), the input impedance Zin is
formulated.
Zin
=
Vin
Iin
=
2TL
t1(t1 +
t2)
for DCM
(eq.3a)
Zin
=
Vin
Iin
=
2L
t1
for CRM (eq.3b)
Ramp
3
Cramp
Ich
closed when
output low
PFC
Modulation
+
--
Vton
Turns off
MOSFET
Vton
ramp
output
Figure 28. PFC Modulation Circuit and Timing
Diagram
The charging current Ich is constant 100 mA current and
the ramp capacitor Cramp is constant for a particular design.
Hence, according to (eq.4) the MOSFET on time t1 is
proportional to Vton.
In order to protect the PFC modulation comparator, the
maximum voltage of Vton is limited to internal clamp
Vton(max) (3.9 V typical) and the ramp pin (Pin 3) is with a
9 V ESD Zener diode. The 3.9 V maximum limit of this
Vton indirectly limits the maximum on time.
closed when zero current
R1 R2
Vcontrol
2
Ccontrol
C1
--
+
R3 Vton
C3
Figure 29. Vcontrol Processing Circuit
The Vcontrol processing circuit generates Vton from
control voltage Vcontrol and time information of zero
inductor current. The circuit in Figure 29 makes (eq.5)
where the value of resistor R1 is much higher than the value
of resistor R2 (R1 >> R2).
Vton
=
T
Vcontrol
t1 + t2
for DCM (eq.5a)
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11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet NCP1601B.PDF ] | |
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