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Número de pieza | ATR0621 | |
Descripción | GPS Baseband Processor | |
Fabricantes | ATMEL Corporation | |
Logotipo | ||
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Features
• 16 Channel GPS Correlator
– 8192 Search Bins with GPS Acquisition Accelerator
– Accuracy: 2.5m CEP (Stand-Alone, S/A off)
– Time to First Fix: 34s (Cold Start)
– Acquisition Sensitivity: –140 dBm
– Tracking Sensitivity: –150 dBm
• Utilizes the ARM7TDMI® ARM® Thumb® Processor Core
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Embedded ICE (In-circuit Emulator)
• 128 Kbyte Internal RAM
• 384 Kbyte Internal ROM with u-blox GPS Firmware
• Fully Programmable External Bus Interface (EBI)
– Maximum External Address Space of 8 Mbytes
– Up to 4 Chip Selects
– Software Programmable 8-bit/16-bit External Data Bus
• 6-channel Peripheral Data Controller (PDC)
• 8-level Priority, Individually Maskable, Vectored Interrupt Controller
– 2 External Interrupts
• 32 User-programmable I/O Lines
• 1 USB Device Port
– Universal Serial Bus (USB) V2.0 Full-speed Device Specification Compliant
– Embedded USB V2.0 Full-speed Transceiver
– Suspend/Resume Logic
– Ping-pong Mode for Isochronous and Bulk Endpoints
• 2 USARTs
– 2 Dedicated Peripheral Data Controller (PDC) Channels per USART
• Master/Slave SPI Interface
– 2 Dedicated Peripheral Data Controller (PDC) Channels
– 8-bit to 16-bit Programmable Data Length
– 4 External Slave Chip Selects
• Programmable Watchdog Timer
• Advanced Power Management Controller (APMC)
– Peripherals Can Be Deactivated Individually
– Geared Master Clock to Reduce Power Consumption
– Sleep State with Disabled Master Clock
– Hibernate State with 32.768 kHz Master Clock
• Real Time Clock (RTC)
• 2.3V to 3.6V or 1.8V Supply Voltage
• Includes Power Supervisor
• 1.8V to 3.3V User-definable I/O Voltage for Several GPIOs with 5V Tolerance
• 1 Kbyte Battery Backup Memory
• 9 mm × 9 mm 100-pin BGA Package (LFBGA100)
GPS Baseband
Processor
ATR0621
Summary
Preliminary
Electrostatic sensitive device.
Observe precautions for handling.
DataSheet4 U .com
Rev. 4890AS–GPS–09/05
Note: This is a summary document. A complete document
is available under NDA. For more information, please con-
tact your local Atmel sales office.
1 page www.DataSheet4U.com
ATR0621 [Preliminary]
3. Pin Configuration
3.1 Pinout
Figure 3-1.
Pinout LFBGA100 (Top View)
10
9
8
7
6
5
4
3
2
1
A B CDE F GH J K
ATR0621
Table 3-1. ATR0621 Pinout
Pin Name LFBGA100 Pin Type
Pull Resistor
(Reset Value)(1) Firmware Label
PIO Bank A
PIO Bank B
CLK23
G9
IN
DBG_EN
H4
IN
PD
EM_A1
A6
OUT
EM_A2
A5
OUT
EM_A3
A4
OUT
EM_A4
A2
OUT
EM_A5
A3
OUT
EM_A6
B5
OUT
EM_A7
B4
OUT
EM_A8
B2
OUT
EM_A9
D4
OUT
EM_A10
C2
OUT
EM_A11
D6
OUT
EM_A12
D7
OUT
EM_A13
C3
OUT
EM_A14
C1
OUT
EM_A15
D5
OUT
EM_A16
C6
OUT
EM_A17
F8
OUT
Notes: 1. PD = internal pull-down resistor, PU = internal pull-up resistor, OH = switched to Output High at reset
2. VDDIO is the supply voltage for the following GPIO pins: P1, P2, P8, P12, P14, P16, P17, P18, P19, P20, P21, P23, P24,
P25, P26, P27 and P29
3. VDD_USB is the supply voltage for the following USB pins: USB_DM and USB_DP. For operation of the USB interface, sup-
ply of 3.0V to 3.6V is required.
4890AS–GPS–09/05
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ATR0621 [Preliminary]
3.3.3
Serial I/O Configuration
The ATR0621 features a two-stage I/O message and protocol selection procedure for the two
available serial ports. At the first stage, a certain protocol can be enabled or disabled for a
given USART port. Selectable protocols are RTCM, NMEA and UBX. At the second stage,
messages can be enabled or disabled for each enabled protocol on each port. In all configura-
tions discussed below, all protocols are enabled on all ports. But output messages are
enabled in a way that ports appear to communicate at only one protocol. However, each port
will accept any input message in any of the three implemented protocols.
Table 3-6. Serial I/O Configuration
USART1
USART2
GPSMODE12 GPSMODE6 GPSMODE5 (Output Protocol/ (Output Protocol/
(Reset = PU) (Reset = PU) (Reset = PD) Baud Rate (kBaud)) Baud Rate (kBaud)) Messages Information Messages
0
0
0 UBX/57.6
NMEA/19.2
High
User, Notice, Warning, Error
0
0
1 UBX/38.4
NMEA/9.6
Medium User, Notice, Warning, Error
0
1
0 UBX/19.2
NMEA/4.8
Low User, Notice, Warning, Error
0 1 1 –/Auto
–/Auto
Off None
1
0
0 NMEA/19.2
UBX/57.6
High
User, Notice, Warning, Error
1
0
1 NMEA/4.8
UBX/19.2
Low User, Notice, Warning, Error
1
1
0 NMEA/9.6
UBX/38.4
Medium User, Notice, Warning, Error
1
1
1 UBX/115.2
NMEA/19.2
Debug
All
Both USART ports accept input messages in all three supported protocols (NMEA, RTCM and
UBX) at the configured baud rate. Input messages of all three protocols can be arbitrarily
mixed. Response to a query input message will always use the same protocol as the query
input message.
In Auto Mode, no output message is sent out by default, but all input messages are accepted
at any supported baud rate. Response to query input commands will be given the same proto-
col and baud rate as it was used for the query command. Using the respective configuration
commands, periodic output messages can be enabled.
The following message settings are used in Table 3-6:
Table 3-7.
NMEA Port
UBX Port
Supported Messages at Setting Low
Standard GGA, RMC
NAV SOL, SVINFO
Table 3-8.
NMEA Port
UBX Port
Supported Messages at Setting Medium
Standard GGA, RMC, GSA, GSV, GLL, VTG, ZDA
NAV
SOL, SVINFO, POSECEF, POSLLH, STATUS, DOP, VELECEF,
VELNED, TIMEGPS, TIMEUTC, CLOCK
4890AS–GPS–09/05
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11 Page |
Páginas | Total 20 Páginas | |
PDF Descargar | [ Datasheet ATR0621.PDF ] |
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