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PDF MB91F233 Data sheet ( Hoja de datos )
| Número de pieza | MB91F233 | |
| Descripción | (MB9123x) 32-bit Microcontroller | |
| Fabricantes | Fujitsu Media Devices | |
| Logotipo |  |
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-16506-1E
32-bit Microcontroller
CMOS
FR60Lite MB91230 Series
MB91233L/MB91F233/MB91F233L/MB91V230
s DESCRIPTION
The MB91230 series is a line of standard microcontrollers, based on a 32-bit high-performance RISC CPU and
containing variety of I/O resources, for embedded control applications which require high CPU performance at
high speed processing.
Audio motor control storage : Designed to specifications for embedded control applications which high CPU
performance power processing.
The MB91230 series belongs to the FR60Lite family.
s FEATURES
• 32-bit RISC, load/store architecture with a 5 stage pipeline
• Maximum operating frequency: 33.6 MHz (oscillation frequency = 4.2 MHz, oscillation frequency 8-multiplier
(PLL clock multiplication method) )
• 16-bit fixed length instructions (basic instructions)
• Execution speed of instructions : 1 instruction per cycle
(Continued)
s PACKAGES
401-pin Ceramic PGA
120-pin Plastic LQFP
128-pin plastic FLGA
(PGA-401C-A02)
(FPT-120P-M05)
(LGA-128P-M01)
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MB91230 Series
Pin correspondence table of LQFP-120 and FLGA-128 in MB91230 series (LGA-128P-M01)
FLGA-128
LQFP-120 No.
No. (JEDEC
No.)
Signal
name
FLGA-128
LQFP-120 No.
No. (JEDEC
No.)
Signal
name
FLGA-128
LQFP-120 No.
No. (JEDEC
No.)
Signal
name
1
A1 P26/SCK2 98
C9 P03/SIN1 18
G1 P42/PPG2
120 A2 P25/SOT2 93 C10
V2
15 G2 VCC3B
117
A3
P22/PWI0/
OP2
85
C11 P72/COM2
*2
G3*4
VCC3*4
114 A4 P17/INT7 87 C12 MD2 17
G4 VCC3
A5
*5
10
D1 P37/ZIN1 71
G9
PA6/
SEG22
109
A6 P12/INT2
6
D2 P33/BIN0 75
G10
VCC
107 A7
X1
8
D3 P35/AIN1 74
G11
PB1/
SEG25
103
A8
P10/INT0
119
D4 P24/SIN2 77
G12
PB2/
SEG26
100 A9 P05/SCK1 111 D5 P14/INT4 21
H1 P45/TOT1
97
A10 P02/SCK0
D6
*5
19 H2 P43/PPG3
94 A11 V3 101 D7 P06/IC0 23 H3 P47/CKOT
91 A12
V0
95
D8 P00/SIN0 20
H4 P44/TOT0
4
B1 P31/SCK3 89
D9 MD0 65
H9
PA0/
SEG16
118
B2
P23/PWI1/
OP3
86
D10 P73/COM3 72
H10
PA7/
SEG23
115
B3
P20/CKI0/
OP0
82
D11
P67/
SEG31*1
69
H11
PA4/
SEG20
112
B4 P15/INT5 84
D12 P71/COM1 73
H12
PB0/
SEG24
110 B5 P13/INT3 13
E1 X0A 24
J1 P50/INT8
106 B6
VSS
9
E2 P36/BIN1 22
J2 P46/TOT2
104 B7 P11/INT1 12
E3 P41/PPG1 26
J3 P52/INT10
99
B8 P04/SOT1
5
E4 P32/AIN0 29
J4
P55/INT13/
TIN2
96
B9 P01/SOT0 81
E9
P66/
SEG30*1
35
J5 PD1/DA1
92 B10
V1
83 E10 P70/COM0 40
J6 PC1/AN1
88
B11 MD1
80
E11
P65/
SEG29*1
47
J7
VSS
90 B12 INIT E12
*5
50 J8 P81/SEG1
(Continued)
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MB91230 Series
Pin no.
LQFP
FLGA
31 M1
32 L3
33 K3
34 M2
35 J5
36 L4
37 M3
38 K4
Pin name
ADTG0
TIN0
INT15
P57
TOT3
PF3
ADTG1
TIN3
PF4
DA0
PD0
DA1
PD1
AVCC
AVRH
AVSS
Circuit
type
C
D
D
F
F
Description
External trigger input pin of A/D converter 0.
This function is valid when corresponding bit of DDR5 reg-
ister is set to input.
Reload timer 0 event input pin.
This function is valid when corresponding bit of DDR5 reg-
ister is set to input.
External interrupt input.
This function is valid when corresponding bit of DDR5 reg-
ister is set to input.
General purpose input/output port.
This function is always valid.
Reload timer 3 output port.
This function is valid when corresponding bit of PFRF
register is set to peripheral function.
General purpose input/output port.
This function is valid when corresponding bit of PFRF
register is set to port function.
External trigger input pin of A/D converter 1.
This function is valid when corresponding bit of DDRF
register is set to input.
Reload timer 3 event input pin.
This function is valid when corresponding bit of DDRF
register is set to input.
General purpose input/output port.
This function is always valid.
D/A converter 0 output pin.
This function is valid when corresponding bit of PFRD
register is set to peripheral function.
General purpose input/output port.
This function is valid when corresponding bit of PFRD
register is set to port function.
D/A converter 1 output pin.
This function is valid when corresponding bit of PFRD
register is set to peripheral function.
General purpose input/output port.
This function is valid when corresponding bit of PFRD
register is set to port function.
Analog power supply (for A/D, D/A converter) .
Analog reference power supply (for A/D, D/A converter) .
GND level input for analog circuit (for A/D, D/A converter) .
(Continued)
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MB91F233.PDF ] | |
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