93C46 Datasheet PDF - ATMEL Corporation
Part Number | 93C46 | |
Description | AT93C46 | |
Manufacturers | ATMEL Corporation | |
Logo | ||
There is a preview and 93C46 download ( pdf file ) link at the bottom of this page. Total 14 Pages |
Preview 1 page No Preview Available ! 1. Features
• Medium-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
• User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
• Three-wire Serial Interface
• 2 MHz Clock Rate (5V)
• Self-timed Write Cycle (10 ms max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
• 8-lead TSSOP and 8-lead JEDEC SOIC Packages
2. Description
The AT93C46 provides 1024 bits of serial electrically erasable programmable read
only memory (EEPROM) organized as 64 words of 16 bits each, when the ORG pin is
connected to VCC and 128 words of 8 bits each when it is tied to ground. The device
is optimized for use in many automotive applications where low power and low voltage
operations are essential. The AT93C46 is available in space-saving 8-lead TSSOP
and 8-lead JEDEC SOIC packages. The AT93C46 is enabled through the Chip Select
pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data
Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the
address is decoded and the data is clocked out serially on the data output pin DO. The
WRITE cycle is completely self-timed and no separate erase cycle is required before
write. The Write cycle is only enabled when it is in the Erase/Write Enable state. When
CS is brought “high” following the initiation of a write cycle, the DO pin outputs the
Ready/Busy status.
Table 2-1.
Pin Name
CS
SK
DI
DO
GND
VCC
ORG
Pin Configuration
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Internal Organization
8-lead SOIC
CS 1
SK 2
DI 3
DO 4
8 VCC
7 DC
6 ORG
5 GND
8-lead TSSOP
CS 1
SK 2
DI 3
DO 4
8 VCC
7 DC
6 ORG
5 GND
Three-wire
Automotive
Temperature
Serial
EEPROMs
1K (128 x 8 or 64 x 16)
AT93C46
Rev. 5125C–SEEPR–11/07
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AT93C46
Table 3-4.
Instruction
Instruction Set for the AT93C46
Op
SB Code
Address
x 8 x 16
READ
1 10
A6 - A0
A5 - A0
EWEN
ERASE
WRITE
ERAL
1
00
11XXXXX
11XXXX
1 11
1 01
A6 - A0
A6 - A0
A5 - A0
A5 - A0
1 00 10XXXXX 10XXXX
Data
x 8 x 16
D7 - D0
D15 - D0
WRAL
1
00
01XXXXX 01XXXX
D7 - D0
D15 - D0
EWDS
1 00 00XXXXX 00XXXX
Note: The Xs in the address field represent don’t care values and must be clocked.
Comments
Reads data stored in memory, at
specified address
Write enable must precede all
programming modes
Erase memory location An - A0
Writes memory location An - A0
Erases all memory locations. Valid
only at VCC = 4.5V to 5.5V
Writes all memory locations. Valid
only at VCC = 4.5V to 5.5V
Disables all programming instructions
Table 3-5.
Instruction
Instruction Set for the AT93C56(1) and AT93C66(2)
Op
SB Code
Address
x 8 x 16
x8
Data
x 16
READ
1 10
A8 - A0
A7 - A0
EWEN
ERASE
WRITE
ERAL
1 00 11XXXXXXX 11XXXXXX
1 11
1 01
A8 - A0
A8 - A0
A7 - A0
A7 - A0
D7 - D0
D15 - D0
1 00 10XXXXXXX 10XXXXXX
WRAL
1 00 01XXXXXXX 01XXXXXX D7 - D0 D15 - D0
EWDS
1 00 00XXXXXXX 00XXXXXX
Note: 1. This device is not recommended for new designs. Please refer to AT93C56A.
2. This device is not recommended for new designs. Please refer to AT93C66A.
3. The Xs in the address field represent don’t care values and must be clocked.
Comments
Reads data stored in memory, at
specified address
Write enable must precede all
programming modes
Erase memory location An - A0
Writes memory location An - A0
Erases all memory locations. Valid
only at VCC = 4.5V to 5.5V
Writes all memory locations. Valid
only at VCC = 5.0V ±10% and Disable
Register cleared
Disables all programming instructions
4. Functional Description
The AT93C46/56/66 is accessed via a simple and versatile 3-wire serial communication inter-
face. Device operation is controlled by seven instructions issued by the host processor. A valid
instruction starts with a rising edge of CS and consists of a Start Bit (logic “1”) followed by the
appropriate Op Code and the desired memory Address location.
READ (READ): The Read (READ) instruction contains the address code for the memory loca-
tion to be read. After the instruction and address are decoded, data from the selected memory
5125C–SEEPR–11/07
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 93C46 electronic component. |
Information | Total 14 Pages | |
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