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PDF A1310AQ Data sheet ( Hoja de datos )
| Número de pieza | A1310AQ | |
| Descripción | Single Chip Processing for CCD Monochrome Camera | |
| Fabricantes | Sony | |
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CXA1310AQ
Single Chip Processing for CCD Monochrome Camera
Description
The CXA1310AQ is designed to perform the basic
signal processing in CCD monochrome cameras with
a single chip. This bipolar lC is most suitable for
compact usage and low power consumption.
32 pin QFP (Plastic)
Features
• Processing from CCD output to 75Ω video output
with a single chip
• Wide variable AGC (4 to 32dB Typ.)
• Built-in operational amplifier for AGC loop
• 75Ω line capacitance minimized using sag compen-
sation function
• Variable white clip level realize wide dynamic range
(140 IRE)
Application
CCD monochrome camera
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage
VCC 7 V
• Storage temperature
Tstg –65 to +150 °C
• Operating temperature
Topr –20 to +75 °C
• Allowable power dissipation PD
500 mW
Operating Conditions
Supply voltage
VCC 4.75 to 5.25 V
Block Diagram and Pin Configuration
25 24 21 20
14 16
12
11 10
17
PG 23 CLP2 S/H S/H S/H
18 OP IN–
19 OP IN+
DATA 22 CLP2
GND3 26
IRIS 27 BLK CLP1
S/H S/H
AGC
CLP1
BLK
13 DET OUT
31 VCC2
VCC1 15
GND1 3
γ1 γ2
CLP1
WC
SETUP
BLK
SYNC
DRIVE
32 VIDEO
1 SAG
28 9
87
65
2 GND2
4 30 29
24 23 22 21 20 19 18 17
CLP2 25
GND3 26
IRIS 27
IRIS CLP 28
BLK 29
CLP1 30
VCC2 31
VIDEO 32
16 AGC CONT
15 VCC1
14 AGC MAX
13 DET OUT
12 AGC OUT
11 γ IN
10 γ CLP
9 LINEAR
1 23 45 67 8
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E89Z21A78-PS
1 page  
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No. Symbol
I/O signal
18 OP IN–
Equivalent circuit
CXA1310AQ
Description
18
150Ω
20µA
Inverted input pin of the
operational amplifier
19 OP IN+
19
150Ω
20µA
Non inverted input pin of the
operational amplifier
(AGC detection signal input
pin)
T
20 SHD2
High: 4.5V and above∗
Low: 0.5V and below
T: 15ns and above
20
150Ω
100µA
Input pin of the sample / hold
pulse
(active at High)
T
21 SHD1
High: 4.5V and above∗
Low: 0.5V and below
T: 15ns and above
21
150Ω
100µA
Input pin of the sample / hold
pulse
(active at High)
22 DATA
[∗1]
[∗2]
[∗1] MAX 800mV
[∗2] MAX 800mV
22
150µA
CCD signal input pin
∗ External applied voltage
–5–
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Application Circuit
CXA1310AQ
100
∗2
∗1
CCD
TG
2200
2200
10k
100k
2.2µF 2.2µF
1M 1µ
24 23 22 21 20 19 18 17
1k
22µF 5V
2700
1k
10k 0.01 2k
47p 47p 25 CLP2
IRIS
CONT
26 GND3
IRIS
DET
27 IRIS
28 IRIS CLP
0.01
29 BLK
30 CLP1
0.01
5V 31 VCC2
10µF 32 VIDEO
100µF
AGC CONT 16
0.01
VCC1 15
10µF
AGC MAX 14
0.01
DET OUT 13
5V
5V
36k
14k
AGC OUT 12
γ IN 11
γ CLP 10
LPF
1µF
LINEAR 9
75 1 2 3 4 5 6 7 8
10µF
75Ω OUT
2200
47p
5V
2200 47P
0.1
SG ∗1 Use a high FT transistor. (2SC3355)
∗2 Use a FET similar to 2SK152 or 2SK300.
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
– 11 –
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet A1310AQ.PDF ] | |
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